Features: Member of the Texas Instruments WidebusTM FamilyEPICTM (Enhanced-Performance Implanted CMOS) Submicron ProcessB-Port Outputs Have Equivalent 26- Series Resistors, So No External Resistors Are RequiredESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine ...
SN74ALVCH162260: Features: Member of the Texas Instruments WidebusTM FamilyEPICTM (Enhanced-Performance Implanted CMOS) Submicron ProcessB-Port Outputs Have Equivalent 26- Series Resistors, So No External Resistors ...
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This SN74ALVCH162260 12-bit to 24-bit multiplexed D-type latch is designed for 1.65-V to 3.6-VCC operation.
The SN74ALVCH162260 is used in applications in which two separate data paths must be multiplexed onto, or demultiplexed from, a single data path. Typical applications include multiplexing and/or demultiplexing address and data information in microprocessor or bus-interface applications. This device also is useful in memory-interleaving applications.
Three 12-bit I/O ports (A1A12, 1B11B12, and 2B12B12) are available for address and/or data transfer. The output-enable (OE1B, OE2B, and OEA) inputs control the bus transceiver functions. The OE1B and OE2B control signals of SN74ALVCH162260 also allow bank control in the A-to-B direction. Address and/or data information can be stored using the internal storage latches. The latch-enable (LE1B, LE2B, LEA1B, and LEA2B) inputs are used to control data storage. When the latch-enable input is high, the latch is transparent. When the latch-enable input goes low, the data present at the inputs is latched and remains latched until the latch-enable input is returned high.
The B outputs, which are designed to sink up to 12 mA, include equivalent 26-W resistors to reduce overshoot and undershoot.To ensure the high-impedance state of SN74ALVCH162260 during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.