SN74ALVCH162268DL

Logic Family :
On Resistance (Max) :
Number of Circuits : 1
Supply Voltage - Max : 3.6 V
Supply Voltage - Min : 1.65 V
Maximum Operating Temperature : + 85 C
Minimum Operating Temperature : - 40 C
Package / Case : SSOP-56
Packaging : Tube
Logic Type : 12-Bit To 24-Bit Registered Bus Exchanger
Propagation Delay Time : 5.9 ns, 5.4 ns


Pinout




Specifications

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . .  . . 0.5 V to4.6 V

Input voltage range, VI:Except I/O ports (see Note 1) . . . . . 0.5 V to 4.6 V
                                     I/O ports (see Notes 1 and 2) . 0.5 V to VCC + 0.5 V
Output voltage range, VO (see Notes 1 and 2) 0.5 V to V_CC. . . . . .  + 0.5 V
Input clamp current, I_IK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50M
AOutput clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . .  . 50 m
Continuous output current, I_O. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through each V_CC or GND . . . . . . . . . . . . . . . .  . ±100 mA
Package thermal impedance, JA (see Note 3):DGG package. . . . . . . 81°C/W
                                                                          DL package. . . . . . .. . 74°C/W
Storage temperature range, T_STG  . . . . . . . . . . . . . . . . . . . . 65°C to 150°C



Description

This  SN74ALVCH162268 12-bit to 24-bit registered bus exchanger is designed for 1.65-V to 3.6-V V_CC operation.
The SN74ALVCH162268 is used for applications in which data must be transferred from a narrow high-speed bus to a wide, lower-frequency bus.

The SN74ALVCH162268 device provides synchronous data exchange between the two ports. Data is stored in the internal registers on the low-to-high transition of the clock (CLK) input when the appropriate clock-enable (CLKEN ) inputs are low. The select(SEL) line is synchronous with CLK and selects 1B or 2B input data for the A outputs.

For data transfer in the A-to-B direction, a two-stage pipeline is provided in the A-to-1B path, with a single storage register in the A-to-2B path. Proper control of these inputs allows two sequential 12-bit words to be presented synchronously as a 24-bit word on the B port. Data flow is controlled by the active-low output enables (OEA, OEB). These control terminals of SN74ALVCH162268 are registered, so bus direction changes are synchronous with CLK. The B outputs, which are designed to sink up to 12 mA, include equivalent 26-Ω resistors to reduce overshoot and undershoot. To ensure the high-impedance state during power up or power down, a clock pulse should be applied as soon as possible and OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Due to OE being routed through a register, the active state of the outputs cannot be determined prior to the arrival of the first clock pulse.

Parameters:

Technical/Catalog Information	SN74ALVCH162268DL
Vendor	Texas Instruments
Category	Integrated Circuits (ICs)
Number of Circuits	12 ~ 24-Bit
Package / Case	56-SSOP
Logic Type	Registered Bus Exchanger
Packaging	Tube
Mounting Type	Surface Mount
Number of Inputs	-
Current - Output High, Low	24mA, 24mA; 12mA, 12mA
Supply Voltage	1.65 V ~ 3.6 V
Operating Temperature	-40°C ~ 85°C
Voltage - Supply	1.65 V ~ 3.6 V
Drawing Number	296; 4040048; DL; 28, 48, 56
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	SN74ALVCH162268DL SN74ALVCH162268DL 296 5177 5 ND 29651775ND 296-5177-5