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SN74ALVCH162373

Features: ` Member of the Texas Instruments Widebus™ Family` Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors` Output Ports Have Equivalent 26-W Series Resistors, So No External Resistors Are Required` Latch-Up Performance Exceeds 250 mA Per JESD 17` ESD Pro...

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SeekIC No. : 004498261 Detail

SN74ALVCH162373: Features: ` Member of the Texas Instruments Widebus™ Family` Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors` Output Ports Have Equivalent 26-W Series Resist...

SN74ALVCH162373 Data Sheet

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Part Number:
SN74ALVCH162373
Supply Ability:
5000

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Product Details

Description



Features:

` Member of the Texas Instruments Widebus™ Family
` Bus Hold on Data Inputs Eliminates the Need
  for External Pullup/Pulldown Resistors
` Output Ports Have Equivalent 26-W Series
  Resistors, So No External Resistors Are Required
` Latch-Up Performance Exceeds 250 mA Per JESD 17
` ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)


Pinout

Connection Diagram


Specifications

MIN MAX UNIT
VCC Supply voltage range 0.5 4.6 V
VI Input voltage range(2) 0.5 4.6 V
VO Voltage range applied to any output in the high-impedance or power-off state(2) 0.5 7 V
VO Voltage range applied to any output in the high state(2) 0.5 +0.5 V
IO Current into any output in the low state -50 mA
IO Current into any output in the high state(3) -50 mA
IIK Input clamp current VI < 0 +50 mA
IOK Output clamp current VO < 0 ±100 mA
qJA Package thermal impedance(4) DGG package 70 °C/W
DL package 63
GQL/ZQL package 42
GRD/ZRD package 36
Tstg Storage temperature rang -65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) This value is limited to 4.6 V maximum.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.


Description

This SN74ALVCH162373 16-bit transparent D-type latch is designed for 1.65-V to 3.6-V VCC operation.

The SN74ALVCH162373 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. This device can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.

A buffered output-enable (OE) input of SN74ALVCH162373 can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components. OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.




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