Features: · Member of the Texas Instruments Widebus E Family· EPIC E (Enhanced-Performance Implanted CMOS) Submicron Process· ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)· Latch-Up Performance Exceeds 250 mA Per JESD 17· Bus Hold...
SN74ALVCH16827: Features: · Member of the Texas Instruments Widebus E Family· EPIC E (Enhanced-Performance Implanted CMOS) Submicron Process· ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 ...
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This 1-bit to 20-bit address register/driver is designed for 1.65-V to 3.6-V VCC operation. This device is ideal for use in applications in which a single address bus is driving four separate memory locations. The SN74ALVCH162832 can be used as a buffer or a register, depending on the logic level of the select (SEL) input.
When SEL is a logic high, the device is in the buffer mode. The outputs follow the inputs and are controlled by the two output-enable (OE) inputs. Each OE controls two groups of seven outputs. When SEL is a logic low, the device is in the register mode. The SN74ALVCH162832 register is an edge-triggered D-type flip-flop. On the positive transition of the clock (CLK) input, data at the A inputs is stored in the internal registers. OE controls operate the same as in the buffer mode.
When OE of SN74ALVCH162832 is a logic low, the outputs are in a normal logic state (high or low logic level). When OE is a logic high, the outputs are in the high-impedance state.Neither SEL nor OE affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.The outputs, which are designed to sink up to 12 mA, include equivalent 26-W resistors to reduce overshoot and undershoot.