Description
Features:
• Full Look Ahead for High-Speed Operations on Long Words
• Arithmetic Operating Modes:
Addition
Subtraction
Shift Operand A One Position
Magnitude Comparison
Twelve Other Arithmetic Operations
• Logic Function Modes:
Exclusive-OR
Comparator
AND, NAND, OR, NOR
• Package Options Include Plastic
Small-Outline (N) Packages, Ceramic (FK)
Chip Carriers, Standard Plastic (NT) and
Ceramic (JT) 300-mil DIPs, and Ceramic
(JW) 600-mil DIPs
Application
An application-specific problem has been identified in the SN54AS181B device. The F0F4 outputs exhibit voltage transients when one or more B-data inputs transition from a high to a low state. The resultant voltage transients can have an amplitude of 2 V relative to VOL with a width of 5 ns at an input threshold of 1.5 V. The transient pulse occurs coincidentally with the high-to-low transition of the B-data input(s) and appears to be caused by internal coupling.
In system operations in which this device is used, it is likely that transmission-line effects minimize this anomaly.
Narrow width of the voltage transient makes the pulse transparent to most circuitry; however, in certain applications, the transients can cause system errors.
Specifications
Supply voltage, VCC :7 V
Input voltage, VI : 7 V
Off-state output voltage (A = B output only) :7 V
Operating free-air temperature range, TA:SN54AS181B:55°C to 125°C
SN74AS181A :0°C to 70°C
Storage temperature range :65°C to 150°C
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Description
The SN54AS181B and SN74AS181A arithmetic logic units (ALUs)/function generators have a complexity of 75 equivalent gates on a monolithic chip. These circuits perform 16 binary arithmetic operations on two 4-bit words as shown in Tables 1 and 2. These operations are selected by the four function-select (S0, S1, S2, and S3) lines and include addition, subtraction, decrement, and straight transfer. When performing arithmetic manipulations, the internal carries are enabled by applying a low-level voltage to the mode-control (M) input. A full carry look-ahead scheme is used to generate fast, simultaneous carry by means of two cascade (G and P) outputs for the four bits in
the package.
If SN74AS181A high speed is not important, a ripple-carry (Cn) input and a ripple-carry (Cn + 4) output are available. The ripple-carry delay is minimized so that arithmetic manipulations for small word lengths can be performed without external circuitry.