SN74AS824A

Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 V
Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 5.5 V
Operating free-air temperature range, TA: SN54AS823A . . . . . . . . . . . . . . . . . . . . 55 to 125
                                                                    SN74AS823A, SN74AS824A . . . . . . . . . . . . 0 to 70
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  65 to 150

† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

These SN74AS823A and SN74AS824A 9-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. These SN74AS823A and SN74AS824A devices are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers, parity bus interfacing, and working registers.

With the clock-enable (CLKEN ) input low, the nine D-type edge-triggered flip-flops enter data on the low-to-high transitions of the clock (CLK) input. Taking CLKEN  high disables the clock buffer, latching the outputs. The SN54AS823A and SN74AS823A have noninverting data (D) inputs and the SN74AS824A has inverting (D ) inputs. Taking the clear (CLR ) input low causes the nine Q outputs to go low independently of the clock. A buffered output-enable (OE ) input can be used to place the nine outputs in either a normal logic state (high or low logic level) or the highimpedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive of SN74AS823A and SN74AS824A provide the capability to drive bus lines without interface or pullup components.

OE  does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.The SN54AS823A is characterized for operation over the full military temperature range of 55to 125. The SN74AS823A and SN74AS824A are characterized for operation from 0to 70.