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SN74AUC02

Features: • Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation• I off Supports Partial-Power-Down Mode Operation• Sub-1-V Operable• Max t pd of 2.2 ns at 1.8 V• Low Power Consumption, 10- µ A Max ICC• ± 8-mA Outp...

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SeekIC No. : 004498459 Detail

SN74AUC02: Features: • Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation• I off Supports Partial-Power-Down Mode Operation• Sub-1-V Operable•...

SN74AUC02 Data Sheet

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Part Number:
SN74AUC02
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/24

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Product Details

Description



Features:

• Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
• I off Supports Partial-Power-Down Mode Operation
• Sub-1-V Operable
• Max t pd of 2.2 ns at 1.8 V
• Low Power Consumption, 10- µ A Max ICC
• ± 8-mA Output Drive at 1.8 V
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)


Specifications

MIN
MAX
UNIT
VCC Supply voltage range
0.5
3.6
V
VI Input voltage range (2)
0.5
3.6
V
VO Voltage range applied to any output in the high-impedance or power-off state (2)
0.5
3.6
V
VO Output voltage range (2)
0.5
VCC + 0.5
V
IIK Input clamp current VI < 0
50
mA
IOK Output clamp current VO < 0
50
mA
IO Continuous output current
± 20
mA
Continuous current through VCC or GND
± 100
mA
JA Package thermal impedance (3)

47

 ° C/W
Tstg Storage temperature range
65
150
°C



Description

This SN74AUC02 quadruple 2-input positive-NOR gate is operational at 0.8-V to 2.7-V VCC , but is designed specifically for 1.65-V to 1.95-V V CC operation.

The SN74AUC02 device performs the Boolean function Y = A + B or Y = A ⋅ B in positive logic.

This SN74AUC02 device is fully specified for partial-power-down applications using Ioff . The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.




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