SN74AUC2G32YZPR

IC DUAL 2-IN POS-OR GATE 8-DSBGA

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SeekIC No. : 003544378 Detail

SN74AUC2G32YZPR: IC DUAL 2-IN POS-OR GATE 8-DSBGA

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Part Number:
SN74AUC2G32YZPR
Mfg:
Supply Ability:
5000

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Upload time: 2025/12/24

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Product Details

Quick Details

Series: 74AUC Manufacturer: Texas Instruments
Logic Family : 74ALS Logic Type: OR Gate
Number of Circuits: 2 Number of Inputs: 2
Features: - Voltage - Supply: 0.8 V ~ 2.7 V
Current - Quiescent (Max): 10µA Current - Output High, Low: 9mA, 9mA
Logic Level - Low: 0 V ~ 0.7 V Logic Level - High: 1.7V
Max Propagation Delay @ V, Max CL: 1.7ns @ 2.5V, 30pF Operating Temperature: -40°C ~ 85°C
Mounting Type: Surface Mount Supplier Device Package: 8-DSBGA, 8-WCSP (1.9x0.9)
Package / Case: 8-XFBGA, DSBGA    

Description

Manufacturer: Texas Instruments
Current - Quiescent (Max): 10µA
Operating Temperature: -40°C ~ 85°C
Mounting Type: Surface Mount
Packaging: Cut Tape (CT)Alternate Packaging
Number of Inputs: 2
Features: -
Logic Type: OR Gate
Series: 74AUC
Voltage - Supply: 0.8 V ~ 2.7 V
Current - Output High, Low: 9mA, 9mA
Logic Level - Low: 0 V ~ 0.7 V
Logic Level - High: 1.7V
Max Propagation Delay @ V, Max CL: 1.7ns @ 2.5V, 30pF
Number of Circuits: 2
Package / Case: 8-XFBGA, DSBGA
Supplier Device Package: 8-DSBGA, 8-WCSP (1.9x0.9)


Features:

` Available in the Texas Instruments
  NanoStar and NanoFree Packages
` Optimized for 1.8-V Operation and Is 3.6-V
  I/O Tolerant to Support Mixed-Mode Signal Operation
` Ioff Supports Partial-Power-Down Mode Operation
` Sub 1-V Operable
` Max tpd of 1.5 ns at 1.8 V
` Low Power Consumption, 10 A at 1.8 V
` ±8-mA Output Drive at 1.8 V
` Latch-Up Performance Exceeds 100 mA Per
  JESD 78, Class II
` ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)



Pinout

  Connection Diagram


Specifications

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 3.6 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 3.6 V
Voltage range applied to any output in the high-impedance or power-off state, VO
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 3.6 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .−50 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .−50 mA
Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±20 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±100 mA
Package thermal impedance, JA (see Note 2): DCT package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C/W
DCU package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .227°C/W
YEP/YZP package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  102°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .−65°C to 150°C
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.



Description

This SN74AUC2G32YZPR dual 2-input positive-OR gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.

The SN74AUC2G32 performs the Boolean function Y  AB or Y  A • B in positive logic.

SN74AUC2G32YZPR NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This SN74AUC2G32YZPR device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

For more information about AUC Little Logic devices, please refer to the TI application report, Applications of
Texas Instruments AUC Sub-1-V Little Logic Devices, literature number SCEA027.




Parameters:

Technical/Catalog InformationSN74AUC2G32YZPR
VendorTexas Instruments (VA)
CategoryIntegrated Circuits (ICs)
Number of Circuits2 - Dual
Package / Case8-DSBGA
Logic TypeOR Gate
PackagingDigi-Reel?
Mounting TypeSurface Mount
Number of Inputs2
Current - Output High, Low9mA, 9mA
Supply Voltage0.8 V ~ 2.7 V
Operating Temperature-40°C ~ 85°C
Voltage - Supply0.8 V ~ 2.7 V
Drawing Number296; 4204741-4; YZP; 8
Lead Free StatusLead Free
RoHS StatusRoHS Compliant
Other Names SN74AUC2G32YZPR
SN74AUC2G32YZPR
296 22013 6 ND
296220136ND
296-22013-6



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