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SN74AUCH32244

Features: ` Low Power Consumption, 40-mA Max ICC` Member of the Texas Instruments Widebus+™ ` ±8-mA Output Drive at 1.8 V Family ` Bus Hold on Data Inputs Eliminates the Need` Optimized for 1.8-V Operation and Is 3.6-V I/O for External Pullup/Pulldown Resistors Tolerant to Support Mixed-Mode...

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SN74AUCH32244: Features: ` Low Power Consumption, 40-mA Max ICC` Member of the Texas Instruments Widebus+™ ` ±8-mA Output Drive at 1.8 V Family ` Bus Hold on Data Inputs Eliminates the Need` Optimized for 1....

SN74AUCH32244 Data Sheet

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Part Number:
SN74AUCH32244
Supply Ability:
5000

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Product Details

Description



Features:

` Low Power Consumption, 40-mA Max ICC
` Member of the Texas Instruments Widebus+™
` ±8-mA Output Drive at 1.8 V Family
` Bus Hold on Data Inputs Eliminates the Need
` Optimized for 1.8-V Operation and Is 3.6
-V I/O for External Pullup/Pulldown Resistors
  Tolerant to Support Mixed-Mode Signal
` Latch-Up Performance Exceeds 100 mA Per
  Operation JESD 78, Class II
` Ioff Supports Partial-Power-Down Mode
` ESD Protection Exceeds JESD 22 Operation
2000-V Human-Body Model (A114-A)
` Sub-1-V Operable
200-V Machine Model (A115-A)
` Max tpd of 1.8 ns at 1.8 V
1000-V Charged-Device Model (C101)


Specifications

Symbol Parameter MIN MAX Units
VCC Supply voltage range -0.5 3.6 V
VI Input voltage range(2) -0.5 3.6 V
VO Voltage range applied to any output in the high-impedance or power-off state(2) -0.5 3.6 V
VO Output voltage range(2) -0.5 VCC + 0.5 V
IIK Input clamp current VI < 0   -50 mA
IOK Output clamp current VO < 0   -50 mA
IO Continuous output current   ±20 mA
ICC Continuous current through VCC or GND   ±100 mA
JA Package thermal impedance(3)     40 °C/W
TSTG Storage temperature range -65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.


Description

This SN74AUCH32244 32-bit buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.

The SN74AUCH32244 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The SN74AUCH32244 device can be used as eight 4-bit buffers, four 8-bit buffers, two 16-bit buffers, or one 32-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE) inputs.

To ensure the SN74AUCH32244 high-impedance state during power up or power down, OE should be tied to VCC through a pullup esistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active SN74AUCH32244 bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

This SN74AUCH32244 device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.




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