SN74AUP1G125 Selling Leads, Price trend, SN74AUP1G125 DataSheet download, circuit diagram from SeekIC.com

Features: ` Available in the Texas Instruments ` Wide Operating VCC Range of 0.8 V to 3.6 V NanoStar™ and NanoFree™ Packages ` Optimized for 3.3-V Operation` Low Static-Power Consumption ` 3.6-V I/O Tolerant to Support Mixed-Mode (ICC = 0.0 mA Max) Signal Operation` Low Dynamic-Power C...

See larger image

SeekIC No. : 004498514 Detail

SN74AUP1G125: Features: ` Available in the Texas Instruments ` Wide Operating VCC Range of 0.8 V to 3.6 V NanoStar™ and NanoFree™ Packages ` Optimized for 3.3-V Operation` Low Static-Power Consumption...

SN74AUP1G125 Data Sheet

Get Latest Price

Part Number:: SN74AUP1G125
Supply Ability:: 5000

Price Break

Qty
1~5000

Unit Price
Negotiable

Processing time
15 Days

SeekIC Buyer Protection PLUS - newly updated for 2013!

Escrow Protection.
Guaranteed refunds.
Secure payments.
Learn more >>

Month Sales

268 Transactions

Rating

evaluate (4.8 stars)

Upload time: 2025/12/24

add to my favourite

Payment Methods

All payment methods are secure and covered by SeekIC Buyer Protection PLUS.

Notice: When you place an order, your payment is made to SeekIC and not to your seller. SeekIC only pays the seller after confirming you have received your order. We will also never share your payment details with your seller.

Product Details

Description

Features:

` Available in the Texas Instruments
` Wide Operating VCC Range of 0.8 V to 3.6 V
NanoStar™ and NanoFree™ Packages
` Optimized for 3.3-V Operation
` Low Static-Power Consumption
` 3.6-V I/O Tolerant to Support Mixed-Mode
(ICC = 0.0 mA Max) Signal Operation
` Low Dynamic-Power Consumption
` tpd = 4.6 ns Max at 3.3 V
(Cpd = 4 pF Typ at 3.3 V)
` Suitable for Point-to-Point Applications
` Low Input Capacitance (Ci = 1.5 pF Typ)
` Latch-Up Performance Exceeds 100 mA Per
` Low Noise Overshoot and Undershoot J
ESD 78, Class II <10% of VCC
` ESD Performance Tested Per JESD 22
` Input-Disable Feature Allows Floating Input 2000
-V Humna-Body Model
Conditions (A114-B, Class II)
` Ioff Supports Partial-Power-Down Mode
200-V Machine Model (A115-A) Operation
1000-V Charged-Device Model (C101)
` Input Hysteresis Allows Slow Input Transition
and Better Switching Noise Immunity at Input
` ESD Protection Exceeds ±5000 V With
Human-Body Model

Pinout

Connection Diagram

Specifications

Symbol	Parameter		MIN	MAX	Units
V_CC	Supply voltage range		-0.5	4.6	V
V_I	Input voltage range(2)		-0.5	4.6	V
V_O	Voltage range applied to any output in the high-impedance or power-off state(2)		-0.5	4.6	V
V_O	Output voltage range(2)		-0.5	VCC + 0.5	V
I_IK	Input clamp current	VI < 0		-50	mA
I_OK	Output clamp current	VO < 0		-50	mA
I_O	Continuous output current			±20	mA
I_CC	Continuous current through VCC or GND			±50	mA
I_ANG	Package thermal impedance(3)	DCT package		206	°C/W
		DCU package		252
		YEP/YZP package
T_STG	Storage temperature range		-65	150	°C

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.

Description

The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable applications. This SN74AUP1G125 family ensures a very low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see Figures 1 and 2).

This SN74AUP1G125 bus buffer gate is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high. This device has the input-disable feature, which allows floating input signals.

To ensure the SN74AUP1G125 high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the
die as the package.

This SN74AUP1G125 device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

SN74AUP1G125

product image

floor Price/Ceiling Price

Price Break

Month Sales

Rating

Payment Methods

Recent History

Description

Customers Who Bought This Item Also Bought

Relays(6300)

Power Supplies - Board Mount(3035)

Cable Assemblies(5)

Transformers(1503)

Optical Inspection Equipment(251)

Integrated Circuits (ICs)(111140)