SN74AVC16373

Features:

Member of the Texas Instruments Widebus(TM) Family
EPIC(TM) (Enhanced-Performance Implanted CMOS) Submicron Process
DOC(TM) (Dynamic Output Control) Circuit Dynamically Changes Output Impedance, Resulting in Noise Reduction Without Speed Degradation
Dynamic Drive Capability Is Equivalent to Standard Outputs With I_OH   and I_OL  of ±24 mA at 2.5-V VCC
Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications
I_off  Supports Partial-Power-Down Mode Operation
ESD Protection Exceeds JESD 22
  2000-V Human-Body Model (A114-A)
  200-V Machine Model (A115-A) Latch-Up Performance Exceeds 100 mA Per
ESD 78, Class II Package Options Include Plastic Thin Shrink Small-Outline (DGG) and Thin Very Small-Outline (DGV) Packages


Pinout




Specifications

Supply voltage range, V_CC   . . . . . . . . . . . . . . . . . . . . . . . .  . .. . . 0.5 V to 4.6 V
Input voltage range, V_I  (see Note 1)  . . . . . . . . . . . . . . . . . .  .. . 0.5 V to 4.6 V
Voltage range applied to any output in the high-impedance or power-off state, V_O
  (see Note 1)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 4.6 V
Voltage range applied to any output in the high or low state, V_O
  (see Notes 1 and 2)  . . . . . . . . . . . . . . . . . . . . .. . . . . . . . 0.5 V to V_CC   + 0.5 V
Input clamp current, I_IK  (V_I  < 0)  . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . .  50 mA
Output clamp current, I_OK   (V_O  < 0)  . . . . . . . . . . . . .. . . . . . . . . . . . . . . .  50 mA
Continuous output current, I_O   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  ±50 mA
Continuous current through each V_CC  or GND  . . . . . . . . . . . . . . .  . . . . .  ±100 mA
Package thermal impedance, q JA (see Note 3): DGG package  . . . . .  . . . . 70°C/W
DGV package  . . . . . . . . . . . . . . . . .  . .. . . . . . . . . . .  . .. . .. . . . . . . . . . . . . 58°C/W
Storage temperature range, T_stg   65°. . . . . . . . . . . . . . . . . . . .. . .  C to 150° C


Description

A SN74AVC16373 Dynamic Output Control (DOC) circuit is implemented, which, during the transition, initially lowers the output impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows typical V  vs I  and V  vs I  curves to illustrate the output impedance and drive capability of the circuit. At the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a high-drive standard-output device. For more SN74AVC16373 information, refer to the TI application reports, AVC Logic Family Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC(TM)) Circuitry Technology and Applications, literature number SCEA009.