SN74CBTLV3126

Features:

􀀀 Standard '126-Type Pinout
􀀀 5- Switch Connection Between Two Ports
􀀀 Isolation Under Power-Off Conditions
􀀀 Latch-up Performance Exceeds 100 mA per JESD 78, Class II
􀀀 Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DBQ), Thin Very Small-Outline (DGV), and Thin Shrink Small-Outline (PW) Packages


Pinout




Specifications

Supply voltage range, V_CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . 0.5 V to 4.6 V
Input voltage range, V_I (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . 0.5 V to 4.6 V
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, I_IK (VI/O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Package thermal impedance, _JA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W
                                                                          DBQ package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139°C/W
                                                                          DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182°C/W
                                                                          PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170°C/W
Storage temperature range, T_stg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . 65°C to 150°C

† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

            2. The package thermal impedance is calculated in accordance with JESD 51.


Description

The SN74CBTLV3126 quadruple FET bus switch features independent line switches. Each switch is disabled when the associated output-enable (OE) input is low.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74CBTLV3126 is characterized for operation from 40°C to 85°C.