Features: • Internal Look-Ahead Circuitry for Fast Counting
• Carry Output for N-Bit Cascading
• Fully Synchronous Operation for Counting
• Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPsPinout
SpecificationsSupply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . 0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . 1.2 V to 7 V
Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA to 5 mA
Voltage range applied to any output in the high state . . . . . . . . . . . . . .. . . . .....0.5 V to VCC
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . .. .. . . . . . . . . . . 40 mA
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C DescriptionThis synchronous, presettable, 4-bit binary counter features an internal carry look-ahead circuitry for application in high-speed counting designs. Synchronous operation is provided by
having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the count-enable (ENP, ENT) inputs and internal gating. This mode of operation eliminates the output counting spikes that are normally associated with asynchronous (ripple-clock) counters; however, counting spikes may occur on the ripple-carry (RCO) output. A buffered clock (CLK) input triggers the four flip-flops on the rising (positive-going) edge of the clock input waveform.
This counter is fully programmable; that is, it may be preset to any number between 0 and 15. As presetting is synchronous, setting up a low level at the load (LOAD) input disables the counter and causes the outputs to agree with the setup data after the next clock pulse regardless of the levels of the enable inputs. The clear function for the SN74F161A is asynchronous and a low level at the clear (CLR) input sets all four of the flip-flop outputs low regardless of the levels of the clock, load, or enable inputs. The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating. Instrumental in accomplishing this function are two count-enable (ENP, ENT) inputs and a ripple-carry (RCO) output. Both ENP and ENT must be high to count, and ENT if fed forward to enable RCO. RCO thus enabled will produce a high-level pulse while the count is 15 (HHHH). The high-level overflow ripple-carry pulse can be used to enable successive cascaded stages. Transitions at ENP or ENT are allowed regardless of the level of the clock input.
The SN74F161A features a fully independent clock circuit. Changes at control inputs (ENP, ENT, or LOAD) that will modify the operating mode have no effect on the contents of the counter until clocking occurs. The function of the counter (whether enabled, disabled, loading, or counting) will be dictated solely by the conditions meeting the setup and hold times.
The SN74F161A is characterized for operation from 0°C to 70°C.
SN74F161A Data Sheet
