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SN74HSTL162822

Features: · Member of the Texas Instruments WidebusE Family· Inputs Meet JEDEC HSTL Standard JESD8-6· All Outputs Have Equivalent 25-W Series Resistors· Packaged in Plastic Thin Shrink Small-Outline PackagePinoutSpecificationsSupply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . ...

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SeekIC No. : 004499002 Detail

SN74HSTL162822: Features: · Member of the Texas Instruments WidebusE Family· Inputs Meet JEDEC HSTL Standard JESD8-6· All Outputs Have Equivalent 25-W Series Resistors· Packaged in Plastic Thin Shrink Small-Outline...

SN74HSTL162822 Data Sheet

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Part Number:
SN74HSTL162822
Supply Ability:
5000

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  • 1~5000
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  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

· Member of the Texas Instruments WidebusE Family
· Inputs Meet JEDEC HSTL Standard JESD8-6
· All Outputs Have Equivalent 25-W Series Resistors
· Packaged in Plastic Thin Shrink Small-Outline Package


Pinout

Connection Diagram


Specifications

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 4.6 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . .  0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 2) . . . . . . . . . . . . . . . . . . . .  ±50 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through each VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  ±100 mA
Package thermal impedance, JA (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .74/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65 to 150


Description

This 14-bit to 28-bit D-type latch is designed for 3.15-V to 3.45-V VCC operation. HSTL levels are expected on the inputs. LVTTL levels are driven on the Q outputs.

All outputs are designed to sink up to 12 mA and include 25-W series resistors to reduce overshoot and undershoot.

The SN74HSTL162822 is particularly suitable for driving an address bus to two banks of memory. Each bank of 14 outputs is controlled with its own latch-enable (LE) input.

Each of the 14 data (D) inputs is tied to the inputs of two D-type latches, which provide true data at the outputs. While LE is low, the outputs (Q) of the corresponding 14 latches follow the D inputs. When LE is taken high, the Q outputs are latched at the levels set up at the D inputs.

The SN74HSTL162822 is characterized for operation from 40°C to 90°C.




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