SN74LS109AN

Flip Flops Dual Pos-Edge-Trig J-K Flip-Flop

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SN74LS109AN Picture
SeekIC No. : 00428365 Detail

SN74LS109AN: Flip Flops Dual Pos-Edge-Trig J-K Flip-Flop

floor Price/Ceiling Price

US $ .56~.8 / Piece | Get Latest Price
Part Number:
SN74LS109AN
Mfg:
Texas Instruments
Supply Ability:
5000

Price Break

  • Qty
  • 0~1
  • 1~25
  • 25~100
  • 100~250
  • Unit Price
  • $.8
  • $.72
  • $.63
  • $.56
  • Processing time
  • 15 Days
  • 15 Days
  • 15 Days
  • 15 Days
View more price & deliveries
Total Cost: $ 0.00

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Upload time: 2025/12/24

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Product Details

Quick Details

Number of Circuits : 2 Logic Family : 74LS
Logic Type : J-K Flip-Flop Polarity : Inverting/Non-Inverting
Input Type : Single-Ended Output Type : Differential
Propagation Delay Time : 40 ns High Level Output Current : - 0.4 mA
Low Level Output Current : 8 mA Supply Voltage - Max : 5.25 V
Maximum Operating Temperature : + 70 C Mounting Style : Through Hole
Package / Case : PDIP-16 Packaging : Tube    

Description

Number of Circuits : 2
Input Type : Single-Ended
Mounting Style : Through Hole
Packaging : Tube
Polarity : Inverting/Non-Inverting
Output Type : Differential
High Level Output Current : - 0.4 mA
Low Level Output Current : 8 mA
Maximum Operating Temperature : + 70 C
Logic Family : 74LS
Supply Voltage - Max : 5.25 V
Package / Case : PDIP-16
Propagation Delay Time : 40 ns
Logic Type : J-K Flip-Flop


Pinout

  Connection Diagram


Specifications

Symbol Parameter Min Typ Max Unit
VCC Supply Voltage
4.75

5.0

5.25
V
TA Operating Ambient Temperature Range
0

25

70
°C
IOH Output Current - High -0.4 mA
IOL Output Current - Low
8.0
mA

 




Description

The SN74LS109AN consists of two high speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JKdesign allows operation as a D flip-flop by simply connecting the J and K pins together.




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