SN74LV125APWG4

Buffers & Line Drivers Quad Bus Buff Gate With 3-State Outputs

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SeekIC No. : 00406341 Detail

SN74LV125APWG4: Buffers & Line Drivers Quad Bus Buff Gate With 3-State Outputs

floor Price/Ceiling Price

US $ .12~.23 / Piece | Get Latest Price
Part Number:
SN74LV125APWG4
Mfg:
Texas Instruments
Supply Ability:
5000

Price Break

  • Qty
  • 0~1
  • 1~25
  • 25~100
  • 100~250
  • Unit Price
  • $.23
  • $.17
  • $.14
  • $.12
  • Processing time
  • 15 Days
  • 15 Days
  • 15 Days
  • 15 Days
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Total Cost: $ 0.00

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Upload time: 2025/12/30

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Product Details

Quick Details

Number of Input Lines : 4 Number of Output Lines : 4
Polarity : Non-Inverting Supply Voltage - Max : 5.5 V
Supply Voltage - Min : 2 V Maximum Operating Temperature : + 85 C
Mounting Style : SMD/SMT Package / Case : TSSOP-14
Packaging : Tube    

Description

Polarity : Non-Inverting
Maximum Operating Temperature : + 85 C
Mounting Style : SMD/SMT
Supply Voltage - Min : 2 V
Supply Voltage - Max : 5.5 V
Package / Case : TSSOP-14
Number of Input Lines : 4
Number of Output Lines : 4
Packaging : Tube


Pinout

  Connection Diagram


Description

The SN74LV125APWG4 is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The features of the SN74LV125APWG4 are: (1)2-V to 5.5-V VCC Operation; (2)Max tpd of 6 ns at 5 V; (3)Typical VOLP (Output Ground Bounce): <0.8 V at VCC = 3.3 V, TA = 25°C; (4)Typical VOHV (Output VOH Undershoot): >2.3 V at VCC = 3.3 V, TA = 25°C; (5)Support Mixed-Mode Voltage Operation on All Ports; (6)Ioff Supports Partial-Power-Down Mode Operation; (7)Latch-Up Performance Exceeds 250 mA Per JESD 17; (8)ESD Protection Exceeds JESD 22: 2000-V Human-Body Model (A114-A), 200-V Machine Model (A115-A), 1000-V Charged-Device Model (C101).

The following is about the absolute maximum ratings of SN74LV125APWG4: (1)Supply voltage range, VCC: 0.5 V to 7 V; (2)Input voltage range, VI: 0.5 V to 7 V; (3)Output voltage range, VO: 0.5 V to VCC + 0.5 V; (4)Input clamp current, IIK (VI < 0): 20 mA; (5)Output clamp current, IOK (VO < 0): -50 mA; (6)Continuous output current, IO (VO = 0 to VCC): ±35 mA; (7)Continuous current through VCC or GND: ±70 mA; (8)Package thermal impedance, qJA: D package 86°C/W, DB package  96°C/W, DGV package 127°C/W, N package  80°C/W, PW package 113°C/W; (9)Storage temperature range, Tstg: 65°C to 150°C.

The electrical characteristics of the SN74LV125APWG4 are: (1)VOH: 1.9V min at VI=VIH or VIL, IOH=-20A; (2)VOL: 0.1V max at VI=VIH or VIL, IOL=20A; (3)II: ±1A max at VI=VIH or VIL, VCC=0V to 5.5V; (4)ICC: 40A max at  VI=VCC or GND, IO=0, VCC=5.5V; (5)Ci: 10pF max at VCC=5V.

 




Parameters:

Technical/Catalog InformationSN74LV125APWG4
VendorTexas Instruments
CategoryIntegrated Circuits (ICs)
Logic TypeLine Driver, Non-Inverting
Package / Case14-TSSOP
PackagingTube
Mounting TypeSurface Mount
Number of Bits per Element1
Number of Elements4 - Quad
Operating Temperature-40°C ~ 85°C
Voltage - Supply2 V ~ 5.5 V
Current - Output High, Low16mA, 16mA
Drawing Number296; 4040064; PW; 8, 14, 16, 20, 24, 28
Lead Free StatusLead Free
RoHS StatusRoHS Compliant
Other Names SN74LV125APWG4
SN74LV125APWG4



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