SN74LV125ARGYR

Polarity : Non-Inverting
Maximum Operating Temperature : + 85 C
Mounting Style : SMD/SMT
Packaging : Reel
Supply Voltage - Min : 2 V
Supply Voltage - Max : 5.5 V
Number of Input Lines : 4
Number of Output Lines : 4
Package / Case : QFN-14


Features:

2-V to 5.5-V V_CC Operation
Max tpd of 6 ns at 5 V
Typical VOLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, TA = 25
Typical VOHV (Output VOH Undershoot)
>2.3 V at V_CC = 3.3 V, TA = 25
Support Mixed-Mode Voltage Operation on
All Ports
Ioff Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 250 mA Per
JESD 17
 ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)


Specifications

Supply voltage range, V_CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, V_I (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Voltage range applied to any output in the high-impedance
or power-off state, V_O (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Output voltage range, V_O (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V_CC + 0.5 V
Input clamp current, I_IK (V_I < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA
Output clamp current, I_OK (V_O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Continuous output current, I_O (V_O = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35 mA
Continuous current through V_CC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±70 mA
Package thermal impedance, _JA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
                                                    (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96/W
                                                    (see Note 3): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127/W
                                                    (see Note 3): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80/W
                                                    (see Note 3): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76/W
                                                   (see Note 3): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113/W
                                                   (see Note 4): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47/W
Storage temperature range, T_stg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65 to 150
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
4. The package thermal impedance is calculated in accordance with JESD 51-5.

Description

The 'LV125A quadruple bus buffer gates are designed for 2-V to 5.5-V VCC operation.

These devices LV125A feature independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high.

To ensure the high-impedance state during power up or power down, LV125A OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

These devices LV125A are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.

Parameters:

Technical/Catalog Information	SN74LV125ARGYR
Vendor	Texas Instruments (VA)
Category	Integrated Circuits (ICs)
Logic Type	Line Driver, Non-Inverting
Package / Case	14-VQFN
Packaging	Digi-Reel?
Mounting Type	Surface Mount
Number of Bits per Element	1
Number of Elements	4 - Quad
Operating Temperature	-40°C ~ 85°C
Voltage - Supply	2 V ~ 5.5 V
Current - Output High, Low	16mA, 16mA
Drawing Number	296; 4203539-2; RGY; 14
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	SN74LV125ARGYR SN74LV125ARGYR 296 13932 6 ND 296139326ND 296-13932-6