PinoutDescriptionThe SN74LV165PWLE parallel-load, 8-bit shift registers aredesigned for 2.7-V to 5.5-V VCC operation. The features of SN74LV165PWLE are: (1)ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0); (2)Latch-Up Performance Ex...
SN74LV165PWLE: PinoutDescriptionThe SN74LV165PWLE parallel-load, 8-bit shift registers aredesigned for 2.7-V to 5.5-V VCC operation. The features of SN74LV165PWLE are: (1)ESD Protection Exceeds 2000 V Per MIL-STD-...
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The SN74LV165PWLE parallel-load, 8-bit shift registers aredesigned for 2.7-V to 5.5-V VCC operation. The features of SN74LV165PWLE are: (1)ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0); (2)Latch-Up Performance Exceeds 250 mAPer JEDEC Standard JESD-17; (3)Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), Ceramic Flat (W) Packages, Chip Carriers (FK), and (J) 300-mil DIPs.
The following is about the absolute maximum ratings of SN74LV165PWLE: (1)Supply voltage range, VCC: 0.5 V to 4.6 V; (2)Input voltage range, VI: 0.5 V to VCC + 0.5 V ; (3)Output voltage range, VO: 0.5 V to VCC + 0.5 V ; (4)Input clamp current, IIK (VI < 0 or VI > VCC): ±20 mA; (5)Output clamp current, IOK (VO < 0 or VO > VCC): ±50 mA; (6)Continuous output current, IO (VO = 0 to VCC): ±25 mA; (7)Continuous current through VCC or GND: ±50 mA ; (8)Maximum power dissipation at TA = 55 (in still air): D package 1.30 W, DB package 0.55 W, PW package 0.5 W; (9)Storage temperature range, Tstg: 65 to 150.
The electrical characteristics of the SN74LV165PWLE are: (1)VOH: VCC-0.2V min at IOH=-100A; (2)VOL: 0.2V max at IOL=100A; (3)II: ±1A max at VI=VCC or GND, VCC=3.6V; (4)ICC: 20A max at VI=VCC or GND, IO=0; (5)Ci: 2.5pF at VI=VCC or GND, VCC=3.3V.