SN74LV20A

Supply voltage range, V_CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, V_I (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Output voltage range applied in high or low state, V_O (see Notes 1 and 2) . . . . . . . . . . −0.5 V to V_CC + 0.5 V
Output voltage range applied in power-off state, V_O (see Note 1) . . . . . . . . . . . . . . . . . . .  . . . . −0.5 V to 7 V
Input clamp current, II_K (V_I < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA
Output clamp current, I_OK (V_O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . . . . −50 mA
Continuous output current, I_O (V_O = 0 to V_CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . ±25 mA
Continuous current through V_CC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, _JA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . 86°C/W
                                                                          DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
                                                                          DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W
                                                                          NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
                                                                          PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
                Storage temperature range, T_stg . . . . . . . . . . . . . .  . . . . . . . . . . . . .. . . . . .  . . . . . −65°C to 150°C
† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated  onditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51-7.

These LV20A dual 4-input positive-NAND gates are designed for 2-V to 5.5-V V_CC operation.

The 'LV20A devices perform the Boolean function Y = A • B • C • D or Y = A + B + C + D in positive logic.

These devices LV20A are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices  when they are powered down.