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SN74LV245A
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MFG:HIT Package Cooled:SOP D/C:99+

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Part Number: SN74LV245A

MFG: HIT

Package Cooled: SOP

D/C: 99+

Description: These octal bus transceivers are designed for 2-V to 5.5-V VCC operation.The 'LV245A devices a...

SN74LV245A General Description

These octal bus transceivers are designed for 2-V to 5.5-V VCC operation.

The 'LV245A devices are designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54LV245A is characterized for operation over the full military temperature range of 55 to 125. The SN74LV245A is characterized for operation from 40 to 85.

SN74LV245A Maximum Ratings

Supply voltage range, V_CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 7 V
Input voltage range, V_I: Except I/O ports (see Note 1) . . . . . . . . . . . . . . . . . . . . .. . . . . . . .0.5 V to 7 V
                                       I/O ports (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . .   . .0.5 V to V_CC + 0.5 V
Output voltage range applied in the high or low state, V_O (see Notes 1 and 2) . .. . 0.5 V to V_CC + 0.5 V
Output voltage range applied in high-impedance or power-off state, V_O (see Note 1) . . . . .0.5 V to 7 V
Input clamp current, I_IK (V_I < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . .. .20 mA
Output clamp current, I_OK (V_O < 0 or V_O > V_CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±50 mA
Continuous output current, I_O (V_O = 0 to V_CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ... . . . . .±35 mA
Continuous current through V_CC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±70 mA
Package thermal impedance, _JA (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . .. . . .... . .115/W
                                                                           DGV package . . . . . . . . . . . . . . . . . . . . . . .. . . . . .146/W
                                                                           DW package . . . . . . . . . . . . . . . . . . . . . . . .. . . . . .97/W
                                                                           NS package . . . . . . . . . . . . . . . . . . . . . . . ... . . . .100/W
                                                                           PW package . . . . . . . . . . . . . . . . . . . . . . . . . .. . .128/W
Storage temperature range, T_stg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ... . .. .65 to 150

SN74LV245A Features

* EPICE (Enhanced-Performance Implanted
   CMOS) Process
* Typical V_OLP (Output Ground Bounce)
   < 0.8 V at V_CC, TA = 25
* Typical V_OHV (Output VOH Undershoot)
   > 2 V at V_CC, TA = 25
* Latch-Up Performance Exceeds 250 mA Per
   JESD 17
* ESD Protection Exceeds 2000 V Per
   MIL-STD-883, Method 3015; Exceeds 200 V
   Using Machine Model (C = 200 pF, R = 0)
* Package Options Include Plastic
   Small-Outline (DW, NS), Shrink
   Small-Outline (DB), Thin Very Small-Outline
   (DGV), and Thin Shrink Small-Outline (PW)
   Packages, Ceramic Flat (W) Packages, Chip
   Carriers (FK), and DIPs (J)

SN74LV245A Connection Diagram

SN74LV245A datasheet

SN74LV245A
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Datasheet: SN74LV245A
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