SN74LV86A

Features: 2-V to 5.5-V VCC Operation Max tpd of 8 ns at 5 V Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Voltage Operation on All Ports Latch-Up Performance Exceeds 250 mA Per JESD 17 E...

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SN74LV86A Picture
SeekIC No. : 004499197 Detail

SN74LV86A: Features: 2-V to 5.5-V VCC Operation Max tpd of 8 ns at 5 V Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C...

floor Price/Ceiling Price

Part Number:
SN74LV86A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/24

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Product Details

Description



Features:

 2-V to 5.5-V VCC Operation
Max tpd of 8 ns at 5 V
Typical VOLP (Output Ground Bounce)
  <0.8 V at VCC = 3.3 V, TA = 25°C
Typical VOHV (Output VOH Undershoot)
  >2.3 V at VCC = 3.3 V, TA = 25°C
Support Mixed-Mode Voltage Operation on All Ports
Latch-Up Performance Exceeds 250 mA Per JESD 17
ESD Protection Exceeds JESD 22
  − 2000-V Human-Body Model (A114-A)
  − 200-V Machine Model (A115-A)
  − 1000-V Charged-Device Model (C101)



Pinout

  Connection Diagram


Specifications

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Voltage range applied to any output in the high-impedance
or power-off state, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . ....... . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Output voltage range, VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . .... . . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . ... . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ... . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, JA (see Note 3): D package . . . . . . . . . . . . . . . . ....... . . . . . . . . . . . . . . . . . . 86°C/W
                                                                          DB package . . . . . . . . . . . . . . . ......... . . . . . . . . . . . . . . . . . 96°C/W
                                                                          DGV package . . . . . . . . . . . . . . ......... . . . . . . . . . . . . . . . . 127°C/W
                                                                          NS package . . . . . . . . . . . . . . . ......... . . . . . . . . . . . . . . . . . 76°C/W
                                                                       PW package . . . . . . . . . . . . . . . . ........... . . . . . . . . . . . . . . . 113°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C

† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51-7.




Description

The 'LV86A devices are quadruple 2-input exclusive-OR gates designed for 2-V to 5.5-V VCC operation.
 
These devices LV86A contain four independent 2-input exclusive-OR gates. They perform the Boolean function
Y = A  B or Y = AB + AB in positive logic.

A common application of LV86A is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output.




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