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Part Number: SN74LVC1G04

 

 

 

 

Description: This device is designed for 1.65-V to 5.5-V V CC operation.The SN74L...


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SN74LVC1G04 General Description


This device is designed for 1.65-V to 5.5-V V CC operation.
The SN74LVC1G04 is a single 3-input positive OR-AND gate. It performs the Boolean function Y = (A + B) ⋅ C in positive logic.

By tying one input to GND or V CC , the SN74LVC1G3208 offers two more functions. When C is tied to V CC , this device performs as a 2-input OR gate (Y = A + B). When A is tied to GND, the device works as a 2-input AND gate (Y = B ⋅ C). This device also works as a 2-input AND gate when B is tied to GND (Y = A ⋅ C).

NanoStar ™ and NanoFree ™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using I off . The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

SN74LVC1G04 Maximum Ratings

  MIN MAX UNIT
VCC Supply voltage range 0.5 6.5 V
VI Input voltage range 0.5 6.5 V
VO Voltage range applied to any output in the high-impedance or power-off state 0.5 6.5 V
VO Voltage range applied to any output in the high or low state 0.5 VCC + 0.5 V
IIK Input clamp current V I < 0 50 mA
IOK Output clamp current V O < 0 50 mA
IO Continuous output current ± 50 mA
Continuous current through V CC or GND ± 100 mA
JA Package thermal impedance DBV package 206 ° C/W
DCK package 252
DRL package 142
YEA/YZA package 154
YEP/YZP package 132
YZV package TBD
Tstg Storage temperature ran

SN74LVC1G04 Features

• Available in the Texas Instruments NanoStar ™ and NanoFree ™ Packages
• Supports 5-V V CC Operation
• Inputs Accept Voltages to 5.5 V
• Max t pd of 5 ns at 3.3 V
• Low Power Consumption, 10- µ A Max I CC
• ± 24-mA Output Drive at 3.3 V
• Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at the Input (V hys = 250 mV Typ @ 3.3 V)
• Can Be Used in Three Combinations:
   OR-AND Gate
   OR Gate
   AND Gate
• I off Supports Partial-Power-Down Mode Operation
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
   2000-V Human-Body Model (A114-A)
   200-V Machine Model (A115-A)
   1000-V Charged-Device Model (C101)
 

SN74LVC1G04 Connection Diagram

SN74LVC1G04  Connection Diagram

SN74LVC1G04 datasheet

SN74LVC1G04
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