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SN74LVC2952

Features: • EPICTM (Enhanced-Performance Implanted CMOS) Submicron Process• Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C• Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25°C• Supports Mixed-Mode Signal Operation on All Ports (...

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SeekIC No. : 004499294 Detail

SN74LVC2952: Features: • EPICTM (Enhanced-Performance Implanted CMOS) Submicron Process• Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C• Typical VOHV (Output VOH Under...

SN74LVC2952 Data Sheet

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Part Number:
SN74LVC2952
Supply Ability:
5000

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  • 1~5000
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  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• EPICTM (Enhanced-Performance Implanted CMOS) Submicron Process
• Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
• Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25°C
• Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC)
• Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages 


Pinout

Connection Diagram


Specifications

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 6.5 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . .. . . .  . . . . .. . . . . . . . . . .  . . . . .0.5 V to 6.5 V
Voltage range applied to any output in the high impedance state
     or power off state, VO (see Note 1)  . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . .  0.5 V to 6.5 V
Voltage range applied to any output in the high
     or low state, VO (see Notes 1 and 2). . . . . . . . . . . . . . . . . . . . . . . . .  . . .  0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . 50 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . .±50 mA
Continuous current through VCC or GND  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ... ±100mA
Maximum power package dissipation at TA = 55°C (in still air)(see Note 3):DB package  . .  . 0.65 W
                                                                                                                     DW package  . . . . 1.7 W
                                                                                                                     PW package  . . . . 0.7 W 
Storage temperature range ,Tstg . . .  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  .  .  65°C to 150°C 


Description

This SN74LVC2952 octal bus transceiver and register is designed for 2.7-V to 3.6-V VCC operation; it can interface to a 5-V system environment.

The SN74LVC2952 consists of two 8-bit back-to-back registers that store data flowing in both directions between two bidirectional buses. Data on the A or B bus is stored in the registers on the low-to-high transition of the clock (CLKAB or CLKBA) input provided that the clock-enable (CLKENAB or CLKENBA) input is low.

Taking the SN74LVC2952 output-enable (OEAB or OEBA) input low accesses the data on either port. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74LVC2952 is characterized for operation from 40°C to 85°C.




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