SN74LVC823A

`Operates From 1.65 V to 3.6 V
`Inputs Accept Voltages to 5.5 V
`Max tpd of 7.9 ns at 3.3 V
`Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25
`Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25
`Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC)
`Ioff Supports Partial-Power-Down Mode Operation
`Latch-Up Performance Exceeds 250 mA Per JESD 17
`ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A)
   200-V Machine Model (A115-A)
   1000-V Charged-Device Model (C101)

This 9-bit bus-interface flip-flop SN74LVC823A is designed for 1.65-V to 3.6-V V_CC operation.

The SN74LVC823A is designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.

With the SN74LVC823A clock-enable (CLKEN) input low, the nine D-type edge-triggered flip-flops enter data on the low-to-high transitions of the clock. Taking CLKENhigh disables the clock buffer, latching the outputs. This device has noninverting data (D) inputs. Taking the clear (CLR ) input low causes the nine Q outputs to go low, independently of the clock.