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SN74LVCH245A

Features: *EPICE (Enhanced-Performance Implanted CMOS) Submicron Process* Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25* Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25* Power Off Disables Outputs, Permitting Live Insertion* ESD Protection Exceeds 200...

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SeekIC No. : 004499400 Detail

SN74LVCH245A: Features: *EPICE (Enhanced-Performance Implanted CMOS) Submicron Process* Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25* Typical VOHV (Output VOH Undershoot) > 2 V at VCC...

SN74LVCH245A Data Sheet

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Part Number:
SN74LVCH245A
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

* EPICE (Enhanced-Performance Implanted
   CMOS) Submicron Process
* Typical VOLP (Output Ground Bounce)
   < 0.8 V at VCC = 3.3 V, TA = 25
* Typical VOHV (Output VOH Undershoot)
   > 2 V at VCC = 3.3 V, TA = 25
* Power Off Disables Outputs, Permitting
   Live Insertion
* ESD Protection Exceeds 2000 V Per
   MIL-STD-883, Method 3015; Exceeds 200 V
   Using Machine Model (C = 200 pF, R = 0)
* Latch-Up Performance Exceeds 250 mA Per
   JESD 17
* Support Mixed-Mode Signal Operation on
   All Ports (5-V Input/Output Voltage With
   3.3-V VCC)
* Bus Hold on Data Inputs Eliminates the
   Need for External Pullup/Pulldown
   Resistors
* Package Options Include Plastic
   Small-Outline (DW), Shrink Small-Outline
   (DB), and Thin Shrink Small-Outline (PW)
   Packages, Ceramic Flat (W) Package,
   Ceramic Chip Carriers (FK), and DIPs (J)


Pinout

Connection Diagram


Specifications

Supply voltage range, VCC  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 6.5 V
Input voltage range, VI: (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . .0.5 V to 6.5 V
Voltage range applied to any output in the high-impedance or power-off state, VO
   (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . .0.5 V to 6.5 V
Voltage range applied to any output in the high or low state, VO
   (see Notes 1 and 2)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ... . . . . . . . .50 mA
Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . .±50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±100 mA
Package thermal impedance, JA (see Note 3): DB package  . . . . . . . . . . . . . . . . . . . . . . . . . . . ... . . .115/W
                                                                           DW package  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .97/W
                                                                           PW package  . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . .128/W
Storage temperature range, Tstg  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . .65 to 150


Description

The SN54LVCH245A octal bus transceiver is designed for 2.7-V to 3.6-V VCC operation and the SN74LVCH245A octal bus transceiver is designed for 1.65-V to 3.6-V VCC operation.

These devices SN74LVCH245A are designed for asynchronous communication between data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

To ensure the high-impedance state during power up or power down, SN74LVCH245A OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry SN74LVCH245A is provided to hold unused or floating data inputs at a valid logic level.

The SN54LVCH245A is characterized for operation over the full military temperature range of 55 to 125. The SN74LVCH245A is characterized for operation from 40 to 85.




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