Position: Home  > All Categories> Integrated Circuits (ICs) > SN74LVT2952

SN74LVT2952

Features: State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low-Static Power DissipationSupport Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)Support Unregulated Battery Operation Down to 2.7 VTypical VOLP (Output Ground Bounce) < 0.8 V...

product image

SN74LVT2952 Picture
See larger image
SeekIC No. : 004499443 Detail

SN74LVT2952: Features: State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low-Static Power DissipationSupport Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V V...

SN74LVT2952 Data Sheet

floor Price/Ceiling Price

Get Latest Price
Part Number:
SN74LVT2952
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

SeekIC Buyer Protection PLUS - newly updated for 2013!

  • Escrow Protection.
  • Guaranteed refunds.
  • Secure payments.
  • Learn more >>

Month Sales

268 Transactions

Rating

evaluate  (4.8 stars)

Upload time: 2025/12/24

add to my favourite

Payment Methods

All payment methods are secure and covered by SeekIC Buyer Protection PLUS.

Notice: When you place an order, your payment is made to SeekIC and not to your seller. SeekIC only pays the seller after confirming you have received your order. We will also never share your payment details with your seller.
Product Details

Description



Features:

 State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low-Static Power Dissipation
 Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
 Support Unregulated Battery Operation Down to 2.7 V
 Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
 ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
 Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
 Bus-Hold Data Inputs Eliminate the Need for External Pullup Resistors
 Support Live Insertion
 Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), and Ceramic (JT) DIPs




Pinout

Connection Diagram


Specifications

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . 0.5 V to4.6 V
Input voltage range, VI  (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . 0.5 V to 7 V
Voltage applied to any output in the high state or power-off state, VO (see Note 1). . 0.5 V to 7 V
Current into any output in the low state, IO: SN54LVT2952 . . . . . . . . . . .. . . . . . . . . . . . ..   . .96 mA 
                                                                       SN74LVT1952 . . . . . . . . . . . . . . . . . . . .  . . ..   .128 mA
Current into any output in the high state, IO (see Note 2): SN54LVT2952 . . . . . . . . . .. . . . . . .48 mA
                                                                                             SN74LVT2952  . . . . . .  .  . . . . .. . .64 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . .. .50 mA
Output clamp current, IOK (VO < 0)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 mA
Maximum power dissipation at TA = 55°C (in still air) (see Note 3): DB package  . . . .  . . . .  . . 0.65 W
                                                                                                         DW package  . . . .. . . . .  .. .1.7 W
                                                                                                         PW package  . . . . . . . . . . . .0.7 W
Storage temperature range, Tstg. . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . .. . . .65°C to 150°C 


Description

These octal bus transceivers and registers SN74LVT2952 are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.

The SN74LVT2952 consist of two 8-bit back-to-back registers that store data flowing in both directions between two bidirectional buses. Data on the A or B bus is stored in the registers on the low-to-high transition of the clock (CLKAB or CLKBA) input provided that the clock-enable (CLKENAB or CLKENBA) input is low. Taking the output-enable (OEAB or OEBA) input low accesses the data on either port.

Active bus-hold circuitry is provided by SN74LVT2952 to hold unused or floating data inputs at a valid logic level.

About SN74LVT2952,To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74LVT2952 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.

The SN54LVT2952 is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74LVT2952 is characterized for operation from 40°C to 85°C.




Customers Who Bought This Item Also Bought

Margin,quality,low-cost products with low minimum orders. Secure your online payments with SeekIC Buyer Protection.
You may also be interested in :
Optoelectronics
SFH7770
TLP423J
Tools
TCP202
G084SN05 V.3
Boxes, Enclosures, Racks
ACLSN12
ACLJIC
Prototyping Products
AVT4168
DE1
Cables, Wires
821-0814-a
415-0100-150
Test Equipment
TOP853
TOP2005
View more