SN74LVT573

These octal latches SN74LVT573 are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability toprovide a TTL interface to a 5-V system environment.

The eight latches of the SN74LVT573 are transparent D-type latches. While the latch-enable (LE) input is high, theQ outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set upat the D inputs.

About SN74LVT573,A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (highor low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drivethe bus lines significantly. The high-impedance state and increased drive provide the capability to drive buslines without need for interface or pullup components. OE does not affect the internal operations of the latches.Old data can be retained or new data can be entered while the outputs are in the high-impedance state.Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullupresistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.The SN74LVT573 is available in TI's shrink small-outline package (DB), which provides the same I/O pin countand functionality of standard small-outline packages in less than half the printed-circuit-board area.The SN54LVT573 is characterized for operation over the full military temperature range of 55°C to 125°C. TheSN74LVT573 is characterized for operation from 40°C to 85°C.