SN74LVTH18514

Supply voltage range, V_CC  ........................ . . . . . . . . .......0.5 V to 4.6 V
Input voltage range, V_I (see Note 1)   . . . . . .. . . . . . . . . . . .0.5 V to 7 V
Voltage range applied to any output in the high or power-off state,
        VO (see Note 1) ............................................................0.5 V to 7 V
Current into any output in the low state, 
                                           IO: SN54LVTH18514  . . . . . . . . . . . . . . . 96 mA
                                           SN54LVTH182514 (A port or TDO)   . . . . 96 mA
                                           SN54LVTH182514 (B port)    . . . . . . . .. . 30 mA
                                           SN74LVTH18514  . . . . . .. . . .. . . . .. . . . 128mA
                                           SN74LVTH182514 (A port or TDO)   . .. . .128mA
                                           SN74LVTH182514 (B port)   . . . . .  .. . .  . 30 mA
Current into any output in the high state, IO (see Note 2):
                                             IO: SN54LVTH18514  . . . . . . . . . . . . .  . 48 mA
                                           SN54LVTH182514 (A port or TDO)    . . . . 48 mA
                                           SN54LVTH182514 (B port)     . . . . . . . .. . 30 mA
                                           SN74LVTH18514   . . . . . .. . . .. . . . ..   . . . 64mA
                                           SN74LVTH182514 (A port or TDO)    .   .. . .64mA
                                           SN74LVTH182514 (B port)    . . . . .  .. . .  . 30 mA
Input clamp current, I_IK (V_I < 0)   . . .. . . . . .. . . . . .. . . . . .. . . .  . . . 50 mA
Output clamp current, I_OK (V_O < 0)   . . . . .. . . . . .. . .. . . .. . . . . ... . .50 mA
Package thermal impedance, _JA (see Note 3): DGG package. . .... ..73°C/W
Storage temperature range, T_stg . . .. . . . . .. . .. . . . . . ... .65°C to 150°C

      The SN74LVTH18514 and 'LVTH182514 scan test devices with 20-bit universal bus transceivers are members of the TI SCOPE testability integrated-circuit family. This family of devices supports IEEE Std 1149.1-1990 boundary scan to facilitate testing of complex circuit-board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface.

      Additionally, these devices SN74LVTH18514 are designed specifically for low-voltage (3.3-V) V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment.