SN74LVTH374

Supply voltage range, V_CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
Input voltage range, V_I (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Voltage range applied to any output in the high-impedance
or power-off state, V_O (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . −0.5 V to 7 V
Voltage range applied to any output in the high state, V_O (see Note 1) . . . . . . . . . . . . . −0.5 V to V_CC + 0.5 V
Current into any output in the low state, I_O: SN54LVTH374 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
                                                                       SN74LVTH374 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Current into any output in the high state, I_O (see Note 2): SN54LVTH374 . . . . . . . . . . . . . . . . . . . . . . . 48 mA
                                                                                             SN74LVTH374 . . . . . . . . . . . . . . . . . . . . . . . 64 mA
Input clamp current, I_IK (V_I < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . −50 mA
Output clamp current, IO_K (V_O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . −50 mA
Package thermal impedance, _JA (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
                                                                           DW package . . . . . . . . . . . . . . . . . . . . . . . . .   . . . . . . 58°C/W
                                                                           NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W
                                                                           PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . 83°C/W
Storage temperature range, T_stg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . .  . −65°C to 150°C

† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This current flows only when the output is in the high state and _VO > V_CC. 3. The package thermal impedance is calculated in accordance with JESD 51-7.

These octal flip-flops SN74LVTH374 are designed specifically for low-voltage (3.3-V) V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment.

The eight flip-flops of the SN74LVTH374 devices are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs ar e set to the logic levels set up at the data (D) inputs.