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SN74SSTL16847

Features: · Member of the Texas Instruments WidebusTM Family· Supports SSTL_3 Signal Inputs and Outputs· Flow-Through Architecture Optimizes PCB Layout· Meets SSTL_3 Class I and Class II Specifications· ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (...

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SeekIC No. : 004499532 Detail

SN74SSTL16847: Features: · Member of the Texas Instruments WidebusTM Family· Supports SSTL_3 Signal Inputs and Outputs· Flow-Through Architecture Optimizes PCB Layout· Meets SSTL_3 Class I and Class II Specificati...

SN74SSTL16847 Data Sheet

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Part Number:
SN74SSTL16847
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

· Member of the Texas Instruments WidebusTM Family
· Supports SSTL_3 Signal Inputs and Outputs
· Flow-Through Architecture Optimizes PCB Layout
· Meets SSTL_3 Class I and Class II Specifications
· ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
· Latch-Up Performance Exceeds 250 mA Per JESD 17
· Packaged in Plastic Thin Shrink Small-Outline Package


Pinout

Connection Diagram


Specifications

Supply voltage range, VCC or VDDQ . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . 0.5 V to 4.6 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . .  . 0.5 V to VCC + 0.5 V
Output voltage range, VO (see Notes 1 and 2) . . . . . . . . . . . . . .  . . 0.5 V to VDDQ + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . 50 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . .  . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Continuous output current, IO (VO = 0 to VDDQ) . . . . . . . . . . . . . . . . . . .  . . . . . . . . . ±50 mA
Continuous current through each VCC, VDDQ or GND . . . . . . . . . . . . . . . . . . .. . . . .  ±100 mA
Package thermal impedance, JA (see Note 3): . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . 65°C to 150°C

† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This current will flow only when the output is in the high state and VO > VDDQ.
3. The package thermal impedance is calculated in accordance with JESD 51.




Description

This 20-bit buffer SN74SSTL16847 is designed for 3-V to 3.6-V VCC operation and SSTL_3 input levels.

About SN74SSTL16847,Data flow from A to Y is controlled by the output-enable (OE). When OE is high, the outputs are in the high-impedance state.To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74SSTL16847 is characterized for operation from 0°C to 70°C.




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