PinoutSpecificationsInput voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to7 VInput/output voltage range, VI/O (see Note 1). . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . .0.5 V to7 V Continuous channel current . ....
SN74TVC3010: PinoutSpecificationsInput voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to7 VInput/output voltage range, VI/O (see Note 1). . . ...
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The SN74TVC3010 provides 11 parallel NMOS pass transistors with a common gate. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.
The device SN74TVC3010 can be used as a 10-bit switch with the gates cascaded together to a reference transistor. The low-voltage side of each pass transistor is limited to a voltage set by the reference transistor. This is done to protect components with inputs that are sensitive to high-state voltage-level overshoots. (See Application Information in this data sheet.)
All of the SN74TVC3010 transistors in the TVC array have the same electrical characteristics; therefore, any one of them can be used as the reference transistor. Since, within the device, the characteristics from transistor-to-transistor are equal, the maximum output high-state voltage (VOH) will be approximately the reference voltage (VREF), with
minimum deviation from one output to another. This is a large benefit of the TVC solution over discrete devices. Because the fabrication of the transistors is symmetrical, either port connection of each bit can be used as the low-voltage side, and the I/O signals are bidirectional through each FET.
The SN74TVC3010 is characterized for operation from 40°C to 85°C.