SN75C189

PinoutSpecificationsSupply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . ... . . . . . . . . 7 VInput voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . 30 V to 30 VOutput voltage range, VO . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to VCC...

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SN75C189 Picture
SeekIC No. : 004499701 Detail

SN75C189: PinoutSpecificationsSupply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . ... . . . . . . . . 7 VInput voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . .. . ....

floor Price/Ceiling Price

Part Number:
SN75C189
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/24

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Product Details

Description



Pinout

  Connection Diagram


Specifications

Supply voltage, VCC (see Note 1) . . . . . . . . . . . . .  . . . . . . . . . .. . . . . . . . . 7 V
Input voltage range, VI . . . . . . . . . . . . . . . . . . . . .  . . . . .. . . . . 30 V to 30 V
Output voltage range, VO . . . . . . . . . . . . . . . . . . . . . . .  0.3 V to VCC+ 0.3 V
Package thermal impedance, JA (see Note 2): D package . . . . . . . . . 86°C/W
                                                                          DB package . . .. . .  . . 96°C/W
                                                                          N package . . . . . . . . . 80°C/W
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . .  . . 260°C
Storage temperature range, Tstg . . . .. . . . . . . . . . . . . . . . . 65°C to 150°C



Description

The SN75C189 and SN75C189A are low-power, bipolar, quadruple line receivers that are used to interface data terminal equipment (DTE) with data circuit-terminating equipment (DCE). These devices have been designed to conform to TIA/EIA-232-F.

The SN75C189 has a 0.33-V typical hysteresis, compared with 0.97 V for the SN75C189A. Each receiver has provision for adjustment of the overall input threshold levels. This is achieved by choosing external series resistors and voltages to provide bias levels for the response-control pins. The output is in the high logic state if the input is open circuit or shorted to ground.

These devices SN75C189 have an on-chip filter that rejects input pulses of less than 1-?s duration. An external capacitor can be connected from the control pins to ground to provide further input noise filtering for each receiver.

The SN75C189 and SN75C189A have been designed using low-power techniques in a bipolar technology. In most applications, these receivers interface to single inputs of peripheral devices such as UARTs, ACEs, or microprocessors. By using sampling, such peripheral devices usually are insensitive to the transition times of the input signals. If this is not the case, or for other uses, it is recommended that the SN75C189 and SN75C189A outputs be buffered by single Schmitt input gates or single gates of the HCMOS, ALS, or 74F logic families.

The SN75C189 and SN75C189A are characterized for operation from 0 to 70.




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