SN8P2602B

The features of SN8P2602B:

• Memory
OTP ROM: 1K * 16 bits.
RAM: 48 * 8 bits.
Four levels stack buffer
` I / O port configuration
Input / output ports: P0, P1, P5
Input: P1.5.
Programmable open-drain side: P1.0.
Wake-up side: P0, P1 level trigger
Internal pull-up resistor: P0, P1, P5.
External interrupt edge triggered: P0.0 (PEDGE register control)
` 3-Level LVD
System reset and power control
• Powerful instruction set
Single-clock instruction cycle (1T)
Most instructions require only one cycle
JMP instruction in the ROM area
CALL instruction in the ROM area
MOVC the ROM look-up table can
• Three interrupt sources
Two internal interrupts: T0, TC0.
An external interrupt: INT0.
• Two 8-bit timer / counter
T0: Basic Timer
TC0: Auto-reload timer / counter / buzzer output
* Built-in watchdog timer, the internal low-speed RC clock (16KHz @ 3V, 2KHz @ 5V)
Dual clock system
External high clock: 10 MHz / RC clock
External high clock: 16 MHz / crystal
Internal low clock: RC clock / 16KHz (3V), 32KHz (5V)
* Mode
Normal mode: Both high and low clock active
Slow mode: Low clock
Sleep mode: high, low clock stop
Green mode: T0 timer wakeup by the
* Package
PDIP 18 pins
SOP 18 pins
SSOP20 pins