SST88VP1107

Features: • All-in-OneMemory: Managed Memory Subsystem for Code and Data in a Single Package Execute-in-place (XIP) Non-volatile area- NOR area- Pseudo-NOR™ (PNOR™) area- High-speed Pseudo-NOR (High-speed PNOR) area RAM area Memory-mapped ATA (mATA) NAND Disk area• Factory ...

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SeekIC No. : 004505406 Detail

SST88VP1107: Features: • All-in-OneMemory: Managed Memory Subsystem for Code and Data in a Single Package Execute-in-place (XIP) Non-volatile area- NOR area- Pseudo-NOR™ (PNOR™) area- High-spee...

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Part Number:
SST88VP1107
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/7

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Product Details

Description



Features:

• All-in-OneMemory: Managed Memory Subsystem for Code and Data in a Single Package
Execute-in-place (XIP) Non-volatile area
- NOR area
- Pseudo-NOR™ (PNOR™) area
- High-speed Pseudo-NOR (High-speed PNOR) area
RAM area
Memory-mapped ATA (mATA) NAND Disk area
• Factory Default Memory Configuration
NOR - 512 KByte (fixed)
High-speed PNOR - 128 KByte (re-configurable)
PNOR - 128 MByte (re-configurable)
RAM - 12 MByte (re-configurable)
mATA - 120 MByte (re-configurable)
• Simple Host Interface
Standard PSRAM interface for all areas
16-bit Bus with required WAIT function
Asynchronous/Synchronous Single-access Read/Write cycles
Synchronous operation up to 80MHz
Page Mode and Burst Mode support in Highspeed PNOR, PNOR, and RAM areas
Burst length up to 32 Words
• 4Mbit Built-in SST SuperFlash®
Standard NOR bus interface and operation
Fast erase and program with SuperFlash
Immediately available upon power-up
Active in the deep power-down mode
• Configurable High-speed PNOR and PNOR
Full address range XIP emulated by using RAM as cache and NAND as non-volatile storage
Configurable memory area size to optimize NAND usage for code and data storage
Built-in cache controller provides cache coherence without host intervention
Configurable cache size for optimum performance and RAM usage
Dynamic Paging for optimum memory usage and Static Paging for minimum access latency
Built-in NAND controller provides Flash File System (FFS) without host intervention
• Standard PSRAM
Up to 8 MWord (128Mbit) of RAM for host
• Memory-Mapped ATA (mATA) NAND Disk Area
Up to 2 Gbit of data storage for host
Standard ATA protocol with bus cycles decoded on memory space
Built-in NAND controller performs NAND Disk function
• Fast Asynchronous Access Time
NOR: 50 ns
High-speed PNOR: 90 ns initial, 30 ns page access
PNOR: 150 ns initial, 55 ns page access
RAM: 130 ns initial, 55 ns page access
mATA: 70 ns
• Read/Write Performance
NOR:
- Read: 40 MBytes/sec, Write: 200 KBytes/sec
High-speed PNOR (cache-hit):
- Read: 140 MBytes/sec, Write: 145 MBytes/sec
PNOR (cache-hit):
- Read:120 MBytes/sec, Write:130 MBytes/sec
RAM:
- Read:120 MBytes/sec, Write: 130 MBytes/sec
mATA:
- Read: 22 MBytes/sec, Write: 7 MBytes/sec
• Protection and Security in NOR Area
Secure Boot capability
256 Word unique ID for enhanced security
32 KWord hardware bottom boot block protection
Two 32 KWord One Time Programmable (OTP) protected areas
64-bit password protection
• Superior NAND Flash Management
Superior data integrity through robust hardware ECC
- Corrects random bit errors for SLC and MLC NAND
Built-in Microcontroller with intelligent firmware
- Flash File System in embedded SuperFlash
- Periodic Refresh to ensure NAND data integrity
- Wear-leveling to prolong product life
- Multi-tasking technology to boost NAND flash performance
• Efficient Power Management Unit
Immediate disabling of unused circuitry
Fast boot time from power-down
• Low Power Consumption
Active Mode current: 75 mA (typical)
Stand-by Mode curent: 500 A (typical)
Deep Power-down mode current: 300 A (typical)
• 1.8V and 3.0V Power Supplies
• Host Interface Voltage Selection Through VDDQ
1.8V or 3.0V
• Temperature Range
0° to +70for commercial operation
-25to +85for wireless operation
• Package Available
80-Ball Low-Profile Ball Grid Array (LBGA) 10x13mm
• All non-Pb (lead-free) devices are RoHS Compliant



Description

The SST88VP1107 is a reliable, high-performance, singlepackage, managed memory subsystem for code and data storage that is easy to use. Designed for embedded applications including mobile phones and portable consumer electronics, this product provides an all-in-one memory solution through its unique capability to configure its various memory resources. Providing code storage (NOR), data storage (NAND), and system RAM (PSRAM) functions all on a single bus, the SST88VP1107 is well suited for manufacturers who need high density memory with enhanced performance, superior quality, and reliability.

The All-in-OneMemory includes a boot NOR Flash, NAND controller, Cache controller, high-speed SRAM, PSRAM, and NAND Flash memory in a Multi Chip Package (MCP).

The embedded NOR Flash offers a fast boot time, and provides many advanced data protection features for secure boot and code protection. The dedicated, performanceoptimized NAND controller provides efficient data integrity, defect management, and wear-leveling by combining a robust hardware Error Correction Code (ECC) and a sophisticated Flash File System (FFS) in the embedded SuperFlash® memory. A built-in cache controller provides both static and dynamic paging modes, with controller-managed, cache-coherence operations.

The SST88VP1107 utilizes the advantages of both NOR and NAND flash memories to attain faster Read, Program, and Erase operations. This unified code and data storage solution allows the host to configure the memory-area and cache sizes for optimum memory utilization.

The All-in-OneMemory is highly configurable. The host device can define a variety of memory configurations using any of the following areas: a direct mapped high-performance 4 Mbit boot NOR memory area, two directly addressable Pseudo-NOR memory areas emulated by RAM and NAND, a directly addressable host RAM memory area, and a performance optimized mass storage area.

Through advanced data protection features, the SST All-in- OneMemory provides robust embedded security. The boot NOR area comes pre-programmed with a 128 Word unique security ID. For greater system security, program the additional 128 Word ID which creates a unique 256 Word security ID. In addition, the boot NOR area offers added security through 32 KWord hardware bottom bootblock protection, two 32 KWord One Time Programmable (OTP) secure areas, volatile block protection, non-volatile block protection, and 64 bit password protection.

The SST88VP1107 offers a built-in Flash File System (FFS) that makes the NAND flash memory management transparent to the host system. This eliminates the need for FFS software on the host, and reduces software development effort and time. The FFS also provides efficient defect management and effective wear-leveling algorithms to ensure even use of NAND flash media, which extend the longevity of the storage device.

The hardware Error Correction Code (ECC) module ensures superior data integrity and reliability by using an advanced ECC algorithm to correct random bit errors for both SLC and MLC NAND flash.

The built-in cache in the High-speed PNOR and PNOR areas improves reliability of these areas. Having a cache in front of the NAND flash helps to reduce the read disturb errors by minimizing repeated direct read access of a page to the NAND flash. The built-in cache also helps to extend the endurance of the storage device by minimizing direct write access to the NAND flash.

The SST88VP1107 is offered in both commercial and wireless temperature ranges in an 80-Ball LBGA package. See Figure 2-1 for pin assignments and Table 2-1 for pin descriptions.




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