Features: 16-bit CPU with DSP functions 31.25ns instruction cycle time at 64MHz max CPU clock Multiply/accumulate unit (MAC) 16 x 16-bit multiplication, 40-bit accumulator Enhanced boolean bit manipulations Single-cycle context switching support On-chip memories 128 Kbyte Flash memory (32-bi...
ST10F271: Features: 16-bit CPU with DSP functions 31.25ns instruction cycle time at 64MHz max CPU clock Multiply/accumulate unit (MAC) 16 x 16-bit multiplication, 40-bit accumulator Enhanced boolean bit m...
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Features: SpecificationsDescription This is the description of ST10 family: This programming manu...

| Symbol | Parameter | Values | Unit |
| VDD | Voltage on VDD pins with respect to ground (VSS) | -0.5 to +6.5 | V |
| VSTBY | Voltage on VSTBY pin with respect to ground (VSS) | -0.5 to +6.5 | V |
| VAREF | Voltage on VAREF pins with respect to ground (VSS) | -0.3 to VDD | V |
| VAGND | Voltage on VAREF pins with respect to ground (VSS) | VSS | V |
| VIO | Voltage on any pin with respect to ground (VSS) | -0.5 to VDD + 0.5 | V |
| IOV | Input current on any pin during overload condition | ± 10 | mA |
| ITOV | Absolute sum of all input currents during overload condition | | 75 | | mA |
| TST | Storage temperature | -65 to +150 | °C |
| ESD | ESD Susceptibility (Human Body Model) | 2000 | V |
The architecture of the ST10F271 combines advantages of both RISC and CISC processors and an advanced peripheral subsystem. The block diagram gives an overview of the different on-chip components and the high bandwidth internal bus structure of the ST10F271.