Features: Enhanced addressing capabilities• Double indirect addressing mode with pointer post-modification.• Parallel Data Move allows one operand move during Multiply-Accumulate instructions without penalty.• CoSTORE instruction (for fast access to the MAC SFRs) and CoMOV (for ...
ST10R272L: Features: Enhanced addressing capabilities• Double indirect addressing mode with pointer post-modification.• Parallel Data Move allows one operand move during Multiply-Accumulate instruc...
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Features: SpecificationsDescription This is the description of ST10 family: This programming manu...

ST10R272L architecture combines the advantages of both RISC and CISC processors with an advanced peripheral subsystem. The following block diagram overviews the different on-chip components and the internal bus structure.