Features: ` Pin-to-pin compatible with ST16C454, ST16C554 and TI's TL16C554AFN and TL16C754BFN
` Intel or Motorola Data Bus Interface select
` Four independent UART channels
`Register Set Compatible to 16C550
`Data rates of up to 1.5 Mbps
`64 Byte Transmit FIFO
`64 Byte Receive FIFO with error tags
`4 Selectable TX and RX FIFO Trigger Levels
`Automatic Hardware (RTS/CTS) Flow Control
`Automatic Software (Xon/Xoff) Flow Control
`Progammable Xon/Xoff characters
`Wireless Infrared (IrDA 1.0) Encoder/Decoder
` Full modem interface
` 2.97V to 5.5V supply operation
` Sleep Mode (200 uA typical)
` Crystal oscillator or external clock inputApplication· Portable Appliances
· Telecommunication Network Routers
· Ethernet Network Routers
· Cellular Data Devices
· Factory Automation and Process ControlsSpecifications
| CH |
4 |
| CPUInterface |
Intel or Motorola |
| Data Rate@5/3.3/2.5V |
1.5/0.5/na |
| Tx/RxFIFO(Bytes) |
64/64 |
| Tx/RxFIFOCtrs |
No |
| Tx/RxFIFOINT Trig |
4 Levels/ 4 Levels |
| AutoRTS/CTS |
Yes |
| IrDaSup |
Yes |
| 5VTolInputs |
No |
| Sup V |
2.97-5.5 |
| Pkgs |
LQFP-64 |
Power Supply Range
Voltage at Any Pin
Operating Temperature
Storage Temperature
Package Dissipation |
7 Volts
GND-0.3 V to 7 V
-40° to +85
-65° to +150
500 mW |
Description
The ST16C6541 is a universal asynchronous receiver and transmitter (UART) with a dual foot print interface compatible with the ST16C554 and ST68C554. The 654 is an enhanced UART with 64 byte FIFOs, automatic hardware/software flow control, and data rates up to 1.5Mbps. Onboard status registers provide the user with error indications and operational status, modem interface control. System interrupts may be tailored to meet user requirements. An internal loop-back capability allows onboard diagnostics.
The 654 is available in a 64-pin LQFP package. The 64-pin package offers the 16 interface mode which is compatible with the industry standard ST16C554.
The ST16C654DCQ64 provides constant active interrupt outputs. The 64 pin devices do not offer TXRDY/RXRDY outputs or the default clock select option (CLKSEL). The 654 combines the package interface modes of the 16C454/554 and 68/C454/554 series on a single integrated chip.
NOTE: 1 Covered by U.S. Patent #5,649,122.
For UART technical support or to obtain an IBIS model for this product, please email Exar's UART Technical Support group.
ST16C654D Data Sheet
