ST6215L

Specifications Symbol Parameter Value Unit VDD Supply Voltage -0.3 to 7.0 V VI Input Voltage VSS - 0.3 to VDD + 0.3(1) V VO Output Voltage VSS - 0.3 to VDD + 0.3(1) V IO Current Drain per Pin Excluding VDD, VSS ±10 mA IVDD Total Current into VDD (source) 50 mA...

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SeekIC No. : 004506590 Detail

ST6215L: Specifications Symbol Parameter Value Unit VDD Supply Voltage -0.3 to 7.0 V VI Input Voltage VSS - 0.3 to VDD + 0.3(1) V VO Output Voltage VSS - 0.3 to VDD + 0.3(1) V IO...

floor Price/Ceiling Price

Part Number:
ST6215L
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/23

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Product Details

Description



Specifications

Symbol Parameter Value Unit
VDD Supply Voltage -0.3 to 7.0 V
VI Input Voltage VSS - 0.3 to VDD + 0.3(1) V
VO Output Voltage VSS - 0.3 to VDD + 0.3(1) V
IO Current Drain per Pin Excluding VDD, VSS ±10 mA
IVDD Total Current into VDD (source) 50 mA
IVSS Total Current out of VSS (sink) 50 mA
Tj Junction Temperature 150 °C
TSTG Storage Temperature -60 to 150 °C

This product contains devices to protect the inputs against damage due to high static voltages, however it is advisable to take normal precaution to avoid application of any voltage higher than the specified maximum rated voltages.

For proper operation it is recommended that VI and VO be higher than VSS and lower than VDD. Reliability is enhanced if unused inputs are connected to an appropriate logic voltage level (VDD or VSS).




Description

The ST6215L/25L are low voltage mask programmed ROM version of ST62T15C,T25C OTP devices.

They offer the same functionality as OTP devices, selecting as ROM options the options defined in the programmable option byte of the OTP version, with the exception of the LVD Reset that is not available.

If the ROM READOUT PROTECTION option is selected, a protection fuse can be blown to prevent any access to the program memory content.

In case the user wants to blow this fuse, high voltage must be applied on the TEST pin.




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