Features: `8K or 16K Program memory
(ROM or Single voltage FLASH)
with read-out protection
`256-bytes EEPROM Data memory
`n-Situ Programming (Remote ISP)
`Enhanced Reset System
`Low voltage supply supervisor with
3 programmable levels
`Low consumption resonator or RC oscillators
and by-pass for external clock source, with safe
control capabilities
`4 Power saving modes
`Standard Interrupt Controller
`44 or 32 multifunctional bidirectional I/O lines:
External interrupt capability (4 vectors)
21 or 19 alternate function lines
12 or 8 high sink outputs
`Real time base, Beep and Clock-out capabilities
`Configurable watchdog reset
`Two 16-bit timers with:
2 input captures (only one on timer A)
2 output compares (only one on timer A)
External clock input on timer A
PWM and Pulse generator modes
`SPI synchronous serial interface
`SCI asynchronous serial interface
`8-bit ADC with 8 input pins
(6 only on ST72334Jx,
not available on ST72124J2)n 8-bit data manipulation
`63 basic instructions
`17 main addressing modes
`8 x 8 unsigned multiply instruction
`True bit manipulation
`Full hardware/software development packagePinout
Specifications TJ = TA + PD x RthJA
Where: TA = Ambient Temperature.
RthJA =Package thermal resistance (junction-to ambient).
PD= PINT + PPORT.
PINT = IDD x VDD (chip internal power).
PPORT =Port power dissipation determined by the user
| Symbol |
Ratings |
Value |
Unit |
|
VDD - VSS |
Supply voltage |
6.5 |
V |
|
VDDA - VSSA |
Analog reference voltage
VDDA > VSS |
6.5 |
V |
|
|VDD_i -VDD_j|
|VDD_i- VDDA| |
Max. variations (power line) |
50 |
mV |
|
|VSS_i -VSS_j|
|VSS_i - VSSA| |
Max. variations (ground line) |
50 |
mV |
|
VIN |
Input voltage |
VSS - 0.3 to VDD + 0.3 |
|
|
VOUT |
Output voltage |
VSS - 0.3 to VDD + 0.3 |
V |
|
ESD |
ESD susceptibility |
2000 |
V |
|
IVDD_i |
Total current into VDD_i (source) |
150 |
V |
|
IVSS_i |
Total current out of VSS_i (sink) |
150 |
mA |
Note:
Stresses above those listed as "absolute maximum ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
Description The ST72334J/N, ST72314J/N and ST72124J devices are members of the ST7 microcontroller family.They can be grouped as follows:
ST72334J/Ndevices are designed for mid-range applications with Data EEPROM, ADC, SPI and SI interface capabilities.
ST72314J/N devices target the same range of applications but without Data EEPROM.
ST72124J devices are for applications that do not need Data EEPROM and the ADC peripheral.
All devices are based on a common industrystandard 8-bit core, featuring an enhanced instruction set.The ST72C334J/N, ST72C314J/N and ST72124J versions feature single-voltage FLASH memory with byte-by-byte In-Situ Programming (ISP) capability.
Under software control, all devices can be placed in WAIT, SLOW, ACTIVE-HALT or HALT mode, reducing power consumption when the application is in idle or standby state.
The enhanced instruction set and addressing modes of the ST7 offer both power and flexibility to software developers, enabling the design of highly efficient and compact application code. In addition to standard 8-bit data management, all ST72124J microcontrollers feature true bit manipulation, 8x8 unsigned multiplication and indirect addressing modes.
ST72124J Data Sheet
