ST9040

·Register oriented 8/16 bit COREwith RUN, WFI and HALT modes
·Minimum instruction cycle time : 500ns (12MHz internal)
·InternalMemory : ROM 16K bytes RAM 256 bytes EEPROM 512 bytes 224 generalpurposeregistersavailable as RAM, accumulatorsor indexregisters(register file)
·80-pin PQFPpackage for ST9040Q 68-lead PLCC package for ST9040C
·DMA controller, Interrupt handler and Serial Peripheral Interface as standard features
·Up to 56 fully programmable I/O pins
·Up to 8 external plus 1 non-maskableinterrupts 16 bit Timer with 8 bit Prescaler, able to be used as a WatchdogTimer
·Two 16 bit Multifunction Timers, each with an 8 bit prescaler and 13 operating modes
·8 channel 8 bit Analog to Digital Converter, with Analog Watchdogs and external references
·Serial Communications Interface with asynchronous and synchronous capability
·Rich Instruction Set and 14 Addressingmodes
·Division-by-Zero trap generation
·Versatile developmenttools, including assembler, linker, C-compiler, archiver, graphic oriented debuggerand hardware emulators
·Real TimeOperatingSystem
·WindowedandOneTimeProgrammableEPROM parts available for prototyping and pre-production developmentphases
·Pin to pincompatible with ST9036

Note: Stresses above those listed as "absolutemaximum ratings" may cause permanentdamage to the device. This is a stress rating only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for  xtended periods may affect device reliability. All voltages are referenced to VSS

The ST9040is aROMmemberof theST9 family of microcontrollers, completely developed and produced by SGS-THOMSONMicroelectronics using a proprietary n-well HCMOS process.

The ST9040 peripheral and functional actions are fully compatible throughout the ST903x/4x family. This datasheet will thus provide only information specific to this ROMdevice.

THE READER IS ASKED TO REFER TO THE DATASHEET OF THE ST9036ROM-BASED DEVICE FOR FURTHER DETAILS.

The nucleus of the ST9040 is the advanced Core which includes the Central Processing Unit (CPU), the Register File, a 16 bit Timer/Watchdog with 8 bit Prescaler, a Serial Peripheral Interface supporting S-bus,I2C-bus and IM-bus Interface,plus two 8 bit I/O ports. The Core has independent memory and register buses allowing a high degree of pipelining to add to the efficiency of the code execution speed of the extensive instruction set. The powerful I/O capabilities demanded by microcontroller applications are fulfilled by the ST9040 with up to 56 I/O lines dedicated to digital Input/Output.

These lines are grouped into up to seven 8 bit I/O Ports and can be configured on a bit basis under software control to provide timing, status signals, an address/databus for interfacing external memory, timer inputs and outputs, analog inputs, external interrupts and serial or parallel I/O with or without handshake.

Three basic memory spaces are available to support this wide range of configurations: Program Memory (internalandexternal),DataMemory (internaland external) andtheRegisterFile,whichincludesthecontrol andstatusregistersof theon-chipperipherals.

Two 16 bit MultiFunction Timers of the ST9040, each with an 8 bit Prescaler and 13 operating modes allow simple use for complex waveform generation and measurement, PWM functions and many other system timing functionsby the usage of the two associated DMA channels for each timer. In addition there is an 8 channel Analog to Digital Converter with integral sample and hold, fast 11ms conversion time and 8 bit resolution. An Analog Watchdog feature is included for two input channels.

Completing the ST9040 is a full duplex Serial Communications Interface with an integral 110 to 375,000 baud rate generator, asynchronous and 1.5Mbyte/s synchronous capability (fully programmable format) and associated address/wake-up option, plus two DMA channels