Features: `Single chip CODEC and FILTER including all LOW-VOLTAGE SLIC functions.`Advanced 12V BJT, 5V CMOS 0.8um technology. Low external component count.`Over-sampling A/D and D/A conversion.`No functional trimming or adjustments required. `Serves a wide range of specifications; i.e. ITUT, LSSGR...
STLC3040: Features: `Single chip CODEC and FILTER including all LOW-VOLTAGE SLIC functions.`Advanced 12V BJT, 5V CMOS 0.8um technology. Low external component count.`Over-sampling A/D and D/A conversion.`No f...
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`Single chip CODEC and FILTER including all LOW-VOLTAGE SLIC functions.
`Advanced 12V BJT, 5V CMOS 0.8um technology. Low external component count.
`Over-sampling A/D and D/A conversion.
`No functional trimming or adjustments required.
`Serves a wide range of specifications; i.e. ITUT, LSSGR.
`A-law, and m-law PCM and Linear voice coding, sw selectable
`GCI compatible interface.
`Programmable Digital-Filters for impedancematching, hybrid-balance, frequency-response and gain.
`Programmable Feeding-Resistance (2 x 50 to 2 x 400) and current-limiting (0-69.3mA).
`Programmable voltage-drop according to transmission needs.
`12kHz/16kHz Teletax Generation with Programmable Level 0-10 Vrms in 40mV steps including shaping and filtering.
`Integrated Ring-Generator with Zero-Crossing. Programmable frequency from 16.6Hz to 60Hz, programmable level up to 85Vrms, Integrated auto ring-trip.
`Signalling functions ON/OFF - Hook, Gnd-key with filter and Programmable persistence check.
`Advanced test capabilities: On-board line tests and circuit tests. Signalling tests for meterpulse TTX and Ringing.
`Tone generator for circuit test.
`3 Loop-back paths.
`Three operating conditions: Power Down, Active, Ringing. Off-hook programmable threshold-level in each of these conditions.
`Interface to High-Voltage SLIC to select modes, provide hard or soft Polarity-Reversal and sense HV (L3000N, L3000S, STLC3170) High Thermal condition.
`On-hook transmission capability.
`Selectable 2/4MHz backplane clock.
`Standard PLCC 44 package.
`On chip Line-card identification.

|
Symbol |
Parameter |
Test condition |
Min. |
Max. |
Unit |
|
Vdd |
Positive Digital Supply Voltage Referred to DGND |
-0.3 |
+5.5 |
V | |
|
VCC |
Positive Analog Supply Voltage Referred to AGND |
-0.3 |
+5.5 |
V | |
|
VEE |
Negative Analog Supply Voltage Referred to AGND |
-5.5 |
+0.3 |
V | |
|
AGND to DGND |
Difference AGND to DGND |
-0.3 |
+0.3 |
V | |
|
VCC to VDD |
Difference VCC to VDD |
-0.3 |
+0.3 |
V | |
|
ILTH |
DC input and output current at any input or output pin (free from latch-up) |
100 |
mA | ||
|
Tj |
Maximum Junction Temperature |
150 |
°C | ||
|
Tstg |
Storage Temperature Range |
-55 |
+150 |
°C | |
|
VIGCI |
Voltage Referred to DGND |
Input GCI pins 3, 4, 5, 40, 41, 42 and 43 |
-0.3 |
VDD +0.3 |
V |
|
VOGCI |
Output GCI pin 6 |
-0.3 |
VDD +0.3 |
V | |
|
VTHVI |
Voltage Referred to AGND |
Interface to H.V. pins: 9, 10 |
VEE-0.3 |
VCC +0.3 |
V |
|
IPDN |
Input Current |
Interface to H.V. pin: 28 |
-0.5 |
0.5 |
mA |
|
VLINT |
Voltage Referred to AGND |
Interface to line pins: 11,12 |
-80 |
80 |
V |
|
VCHVI |
Interface to H.V. Current Input pins: 15, 19 |
VEE -0.3 |
VCC +0.3 |
V | |
|
VBHVI |
Voltage Reference Input pin: 25 |
VEE -0.3 |
VCC +0.3 |
V | |
|
V2WI |
Voltage Referred to AGND |
Ouput Buffer pin: 26 |
VEE -0.3 |
VCC +0.3 |
V |
|
VDIO |
Voltage Referred to DGND |
I/O pins: 7, 8, 38, 39 |
-0.3 |
VDD +0.3 |
V |
|
VMIS |
Ring Sync pins: 29, 36 |
-0.3 |
VDD +0.3 |
V | |
|
VDUN |
Reserved pins: 37, 44 |
-0.3 |
VDD +0.3 |
V | |
|
VTID |
Voltage Referred to AGND |
Identification Code pins:31, 32 |
VEE -0.3 |
VCC +0.3 |
V |
|
VBID |
Identification Code pin: 35 |
-0.3 |
VCC +0.3 |
V | |
|
VCREV |
Battery Reversal capacitor input pin: 14 |
VEE -0.3 |
+0.3 |
V | |
|
VACDC |
AC and DC - synthesis Reference Resistor pins 16, 22 |
-3 |
+3 |
V | |
|
AC/DC line split pin: 20 |
VEE -0.3 |
VCC +0.3 |
V | ||
|
AC splitter capacitor pin: 21 |
-0.3 |
+0.3 |
V | ||
|
VOREF |
Reference Voltage output pin: 23 |
-0.3 |
VCC +0.3 |
V | |
|
VAUN |
Reserved pins: 13, 17, 18, 24, 30 |
-0.3 |
VCC +0.3 |
V |
(*) Stresses in excess of those listed under "Absolute Maximum Rate" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions in excess of those indicated in the operational sections of this specification is not implied.
The subscriber line codec-filter, STLC3040, is fabricated in BiCMOS (12V bipolar / 5V CMOS) technology. It uses Digital-Signal-Processing( DSP) to implement central-office telephone interface features: DC-feed, Supervision, PCMCodec- Filter, Ring, Teletax metering (TTX) and
Test functions. The STLC3040 is fully programmable and needs few external resistors and capacitors. The interfaces the subscriber's line via the High-Voltage (HV) (L3000N, L3000S, STLC3170) device and the central-office back- plane via a GCI compatible interface (see fig.2). The GCI handles all STLC3040 control and voice channel.
The STLC3040 processes the transversal linecurrent sensed by the ST HV (L3000N, L3000S, STLC3170) Line Driver Circuit and generates voltage-drive to the line via the HV (L3000N, L3000S, STLC3170), thus synthetizing the impedances required by various world administrations .Line impedances as well as the two-to-four wire conversion synthesis are software programmable. Also Transmit (Tx) and Receive(Rx) AC frequency response, determined by DSP-filters, guarantee voice-band flat-response. Tx and Rx Gains are programmable as well. Digitized voice can be encoded on A-law or u-law.
The DC characteristic is obtained by selecting limit-current value, DC-feed resistance (2 X 50W steps) and Drop-voltage. STLC3040 also permits On-hook transmission and TTX pulse injection with filtering and shaping. TTX metering pulse generation (12 or 16kHz) has programmable amplitude up to 10 Vrms.Off-hook detection with programmable thresholds is possible in all operating modes as described in section 4.
Ring-signal with zero-crossing start/stop injection is generated on chip STLC3040 with programmable frequency and amplitude. In addition, when Ringtrip is detected, the Ring-signal is automatically disconnected at the next zero-crossing. Power consumption is kept low by providing a "Power-Down" mode where the HV-SLIC is switched off (Power Denial). A set of internal resistors connected to the line allows Off-hook detection in this mode. Overall power dissipation is around 50mW (max.) in Power Down mode.
Several testing features are included in the STLC3040, both for self-test and to test line leakage, capacitance ..etc, thus saving on test equipment and relays. Measured DC quantities are digitized and sent via the B1 voice channel to the backplane. With proper software selection each signal can be modulated by a 1KHz carrier before being sent to B1 voice channel. Programmable linear code, software selectable, boosts the calculation resolution.Sigma-Delta converters (ASD: Analog, DSD: Digital) make the conversion independent of technology parameters (fig. 3).