STLVD112

The STLVD112 is a low voltage differential to LVTTL signal converter with enhanced loop-back and crosspoint features. The synchronous design allows a phase alignment between a clock and its data; this means a better BER (Bit Error Rate) performance.

The advanced 0.35m technology makes the STLVD112 suitable for data rates up to 200Mbit.The main application field is SDH/SONET telecom infrastructure. The STLVD112 flexible switch architecture makes it easy to implement multiple protection schemes in STM1 access systems.Thanks to the flexible multiplexing allowed, it becomes simple to redirect the data/clock signal coming from the faulty access card to the spare card. In normal mode the STLVD112 converts the differential data levels of the LVDS and relatedclock signal from (to) the line interface in LVTTL level signals to (from) the backpanel. In addition the switch functions prevent the equipment from line interface faults. In fact, it is possible to switch the signals coming from a different line interface to the local line interface or the signals from the local line interface to a different line interface.

The features of STLVD112:

 24mA CMOS OUTPUT DRIVE CURRENT
LVTTL INPUT THRESHOLDS
CONTROLLED SKEW BETWEEN DATA AND CLOCK SIGNALS
LVDS INPUT-OUTPUT UP TO 155 MHZ
IMPROVED LATCH-UP IMMUNITY UP TO 300mA