STLVDS3487

Features:

` MEETS OR EXCEEDS THE REQUIREMENTS OF ANSI TIA/EIA-644 STANDARD
` LOW VOLTAGE DIFFERENTIAL SIGNALING WITH TYPICAL OUTPUT VOLTAGE OF 350mV AND A 100  LOAD
` TYPICAL OUTPUT VOLTAGE RISE AND FALL TIMES OF 750ps (400Mbps)
` TYPICAL PROPAGATION DELAY TIMES OF 1.7ns
` OPERATES FROM A SINGLE 3.3V SUPPLY
` POWER DISSIPATION 25m W TYPICAL PER DRIVER AT 200MHz
` DRIVER AT HIGH IMPEDANCE WHEN DISABLED OR WITH V<sub>CC</sub> =0V
` PIN COMPATIBLE WITH THE MC3487 AND SN65LVD3487
` LOW VOLTAGE TTL (LVTTL) LOGIC INPUT



Pinout




Specifications

Symbol	Parameter	Value	Unit
VCC	Supply Voltage (Note 1)	-0.5 to 4.6	V
VI	Input Voltage	-0.5 to (VCC + 0.5)	V
Tstg	Storage Temperature Range	-65 to +150

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.

Note 1: All voltages except differential I/O bus voltage, are with respect to the network ground terminal.


Description

The STLVDS3487 is a quad differential line drivers that implements the electrical characteristics of low voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5V differential standard levels (such as TIA/EIA-422B) to reduce the power, increase the switching speeds and allows operations with a 3.3V supply rail. Any of the four current mode drivers will deliver a minimum differential output voltage magnitude of 247mV
into a 100load when enabled.

The intended application of this device STLVDS3487 and signalling technique is for point-to-point baseband data transmission over controlled impedance media approximately 100. The transmission media may be printed circuit board traces, backplanes or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and noise coupling to the environment.

The STLVDS3487 is characterized for operation from -40 to 85.