STP30NE06

MOSFET RO 511-STP36NF06

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STP30NE06 Picture
SeekIC No. : 00162158 Detail

STP30NE06: MOSFET RO 511-STP36NF06

floor Price/Ceiling Price

Part Number:
STP30NE06
Mfg:
STMicroelectronics
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/24

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Product Details

Quick Details

Transistor Polarity : N-Channel Drain-Source Breakdown Voltage : 60 V
Gate-Source Breakdown Voltage : +/- 20 V Continuous Drain Current : 30 A
Resistance Drain-Source RDS (on) : 0.042 Ohms Configuration : Single
Maximum Operating Temperature : + 175 C Mounting Style : Through Hole
Package / Case : TO-220 Packaging : Tube    

Description

Transistor Polarity : N-Channel
Gate-Source Breakdown Voltage : +/- 20 V
Configuration : Single
Maximum Operating Temperature : + 175 C
Mounting Style : Through Hole
Packaging : Tube
Package / Case : TO-220
Continuous Drain Current : 30 A
Drain-Source Breakdown Voltage : 60 V
Resistance Drain-Source RDS (on) : 0.042 Ohms


Features:

 TYPICAL RDS(on) = 0.042  
AVALANCHERUGGED TECHNOLOGY
100% AVALANCHE TESTED
175oC OPERATING TEMPERATURE
HIGH dV/dt CAPABILITY
APPLICATIONORIENTED CHARACTERIZATION



Application

DC MOTOR CONTROL
DC-DC & DC-AC CONVERTERS
SYNCHRONOUS RECTIFICATION



Specifications

Symbol Parameter Value Unit
STP30NE06 STP30NE06FP
VDS Drain-source Voltage (VGS = 0) 60 V
VDGR Drain-gate Voltage (RGS = 20 k ) 60 V
VGS Gate- source Voltage ±20 V
ID Drain Current (continuos) at TC = 25
30
17 A
ID Drain Current (continuos) at TC = 100 21 12 A
IDM() Drain Current (pulsed) 120 68 A
PTOT Total Dissipation at TC = 25 80 30 W
  Derating Factor 0.53 0.2 W/
VISO Insulation Withstand Voltage (DC) ----- 2000 V
dV/dt Peak Diode Recovery voltage slope 7 V/ns
Tstg Storage Temperature 65 to 175
Tj Max. Operating Junction Temperature 75
(•) Pulse width limited by safe operating area  ( 1) ISD 30 A, di/dt 300 A/ms, VDD V(BR)DSS, Tj TJMAX


Description

This STP30NE06 Power Mosfet is the latest development of STMicroelectronics unique "Single Feature Size" process whereby a single body is implanted on a strip layout structure. The resulting transistor shows extremely high packing density for low onresistance,rugged avalance characteristics and less critical alignment steps therefore a remarkable manufacturingreproducibility.




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