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STi5500

Features: .ENHANCED 32-BIT VL-RISC CPU- FAST INTEGER/BIT OPERATION AND. VERY HIGH CODE DENSITY HIGH PERFORMANCE MEMORY/CACHE SUBSYSTEM- 2KBYTES INSTRUCTION CACHE, 2KBYTES SRAM, 2KBYTES DATA CACHE/SRAM.- 160MBYTES/S BANDWIDTH COMBINED VIDEO AND AUDIO DECODER CORE- VIDEO DECODER FULLY SUPPORTS MPEG-...

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SeekIC No. : 004507724 Detail

STi5500: Features: .ENHANCED 32-BIT VL-RISC CPU- FAST INTEGER/BIT OPERATION AND. VERY HIGH CODE DENSITY HIGH PERFORMANCE MEMORY/CACHE SUBSYSTEM- 2KBYTES INSTRUCTION CACHE, 2KBYTES SRAM, 2KBYTES DATA CACHE/SR...

STi5500 Data Sheet

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Part Number:
STi5500
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/26

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Product Details

Description



Features:

.ENHANCED 32-BIT VL-RISC CPU
- FAST INTEGER/BIT OPERATION AND
. VERY HIGH CODE DENSITY HIGH PERFORMANCE MEMORY/CACHE SUBSYSTEM
- 2KBYTES INSTRUCTION CACHE, 2KBYTES
  SRAM, 2KBYTES DATA CACHE/SRAM
.- 160MBYTES/S BANDWIDTH COMBINED VIDEO AND AUDIO DECODER CORE
- VIDEO DECODER FULLY SUPPORTS MPEG-2 MP@ML
- MEMORY REDUCTION - PAL MP@ML IN 12MBITS
- 2 TO 8 BIT PER PIXEL OSD OPTIONS
- LETTERBOX (16:9) DISPLAY FORMAT
- HORIZONTAL AND VERTICAL RESIZING FUNCTIONS
- AUDIO DECODER SUPPORTS LAYERS
  1 AND 2 OF MPEG, INTERFACE TO
. EXTERNAL DOLBY AC-3ä DECODER PAL/NTSC ENCODER
- MACROVISIONä VERSION 7.01/6.1 COMPATIBLE
- TELETEXT, AND CLOSED CAPTION
- SIMULTANEOUS OUTPUT OF RGB, CVBS
. AND COMPONENT VIDEO HIGH PERFORMANCE SDRAM MEMORY INTERFACE
- SUPPORTS 1 OR 2 16MBIT 100MHz SDRAMS
- ACCESSIBLE BY MPEG DECODER, CPU AND DMAS
- HIGH BANDWIDTH ACCESS FROM CPU
  ALLOWS HIGH PERFORMANCE OSD
. OPERATIONS PROGRAMMABLE MEMORY INTERFACE
- 4 BANKS EACH 8/16 BITS WIDE
- SUPPORT FOR MIXED MEMORY,
. PERIPHERALS, DRAM AND POWER PC LINK INTERFACE
- SERIAL INPUT
- SUPPORTS DSS, DVB, AND DVD BITSTREAMS
- 32 PIDS SUPPORTED
- DES AND DVB DESCRAMBLERS
.- 32 SI/PSI FILTERS OF 16 BYTES VECTORED INTERRUPTS - 8 PRIORITIZED
.LEVELS DMA ENGINES/INTERFACES
- 2 UARTS, 1 I2C CONTROLLER, 3 PWM
  OUTPUTS, 3 TIMERS, 3 CAPTURE TIMERS
- 24 BITS OF PIO SHARED WITH SERIAL INTERFACES
- OS LINK INTERFACE
- BLOCK MOVE DMA, 2 MPEG DMAS
.- TELETEXT INTERFACE PROFESSIONAL TOOLSET SUPPORT
- ANSI C COMPILER AND LIBRARIES
.- INQUEST ADVANCED DEBUGGING TOOLS NON-INTRUSIVE DEBUG CONTROLLER
- HARDWARE BREAKPOINTS
.- REAL TIME TRACE 208 PIN PQFP PACKAGE


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Connection Diagram


Description

The STi5500 is the first of a new generation of integrated multimedia decoder engines for set top box and DVD applications. It offers a high level of integration by reducing the complete set top box decoding chain from Transport Demux to PAL/NTSC Encoder onto one chip. At the same time it dramatically enhances CPU and Graphics performance, and cuts down total system memory cost.




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