SY100E136

The SY10/SY100E136 are 6-bit synchronous, presettable, cascadable universal counters. The SY100E136 generate a look-ahead-carry output and accept a look-ahead-carry input. These two features allow for the cascading of multiple E136s for wider bit width counters that operate at very nearly the same frequency as the stand-alone counter.

The CLOUT output of SY100E136 will pulse LOW for one clock cycle one count before the E136 reaches terminal count. The COUT output will pulse LOW for one clock cycle when the counter reaches terminal count. For more information on utilizing the look-ahead-carry features of the device, please refer to the applications section of this data sheet. The differential COUT output facilitates the E136's use in programmable divider and self-stopping counter applications.

Unlike the SY100E136 and other similar universal counter designs, the SY100E136 carry-out and look-ahead-carry-out signals are registered on chip. This design alleviates the glitch problem seen on many counters where the carryout signals are merely gated. Because of this architecture, there are some minor functional differences between the SY100E136 and H136 counters. The user, regardless of familiarity with the H136, should read this data sheet carefully. Note specifically (see block diagram) the operation of the carry-out outputs and the look-aheadcarry- in input when utilizing the Master Reset.

When left open, all of the input pins will be pulled LOW via an input pulldown resistor. The Master Reset of SY100E136 is an asynchronous signal which, when asserted, will force the Q outputs LOW.

The SY100E136 outputs need not be terminated for the E136 to function properly. In fact, if these outputs will not be used in a system, SY100E136 is recommended that they be left open to save power and minimize noise. This practice will minimize switching noise which can reduce the maximum count frequency of the device, or significantly reduce margins against other noise in the system.