SY100EL51

The SY10/SY100EL51 are differential clock D flip-flops with reset. The SY100EL51 functionally similar to the E151 devices, with higher performance capabilities. With propagation delays and output transition times significantly faster than the E151, the EL51 is ideally suited for those applications which require the ultimate in AC performance.

The reset input of SY100EL51 is an asynchronous, level triggered signal. Data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The differential clock inputs of the SY100EL51 allow the device to be used as a negative edge triggered flip-flop.

The differential input employs clamp circuitry to maintain stability under open input (pulled down to VEE) conditions.