SY100EL90V

3.3V and 5V power supply options
500ps propagation delay
Fully differential design
Supports both standard and low voltage operation
Available in 20-pin SOIC package

The SY100EL90V is a triple ECL/LVECL-to-PECL/ LVPECL translator. The device can translate over all combinations of supply voltages: -5V ECL to 5V PECL, -5V ECL to 3.3V LVPECL, -3.3V LVECL to 5V PECL or -3.3V LVECL to 3.3V LVPECL.

A V_BB output of SY100EL90V is provided for interfacing with single ended ECL signals at the input. If a single ended input is to be used, the V_BB output should be connected to the D input. The active signal would then drive the D input. When used, the VBB output should be bypassed to via a 0.01F capacitor. The V_BB output is designed to act as the switching reference for the EL90V under single ended input switching conditions. As a result this pin can only source/sink up to 0.5mA of current.

To accomplish the level translation the SY100EL90V requires three power rails. The V_CC supply should be connected to the positive supply, and the V_EE pin should be connected to the negative power supply. The GND pins as expected are connected to the system ground plane. Both V_EE and V_CC should be bypassed to ground via 0.01F capacitors.

Under open input conditions, SY100EL90V, the D input will be biased at V_CC/2 and the D input will be pulled to V_EE. This condition will force the Q output to a LOW, ensuring stability.