SY100ELT22

Features: 300ps typical propagation delay <100ps output-to-output skew Differential PECL outputs PNP TTL inputs for minimal loading Flow-through pinouts Available in 8-pin SOIC packagePinoutSpecifications Symbol Parameter Value Unit VCC Power Supply Voltage 0.5 to +7.0 V VI TT...

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SY100ELT22 Picture
SeekIC No. : 004509941 Detail

SY100ELT22: Features: 300ps typical propagation delay <100ps output-to-output skew Differential PECL outputs PNP TTL inputs for minimal loading Flow-through pinouts Available in 8-pin SOIC packagePinoutSpeci...

floor Price/Ceiling Price

Part Number:
SY100ELT22
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/23

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Product Details

Description



Features:

300ps typical propagation delay
<100ps output-to-output skew
Differential PECL outputs
PNP TTL inputs for minimal loading
Flow-through pinouts
Available in 8-pin SOIC package





Pinout

  Connection Diagram




Specifications

Symbol Parameter Value Unit
VCC Power Supply Voltage 0.5 to +7.0 V
VI TTL Input Voltage 0.5 to VCC V
II TTL Input Current 30 to +5.0 mA
IOUT ECL Output Current
- Continuous
- Surge
50
100
mA
Tstore Storage Temperature 65 to +150 °C
TA Operating Temperature 40 to +85 °C





Description

The SY10/SY100ELT22 are dual TTL-to-differential PECL translators. Because PECL (Positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and the low skew, dual gate design of the ELT22 makes SY100ELT22 ideal for applications which require the tranlation of a clock and a data signal.

The SY100ELT22 is available in both ECL standards: the 10ELT is compatible with positive ECL 10H logic levels, while the 100ELT is compatible with positive ECL 100K logic levels.






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