Features: ·9-bit ideal for byte-parity applications·Flow-through configuration·Extra TTL and ECL power/ground pins to minimize switching noise·Dual supply·3.5ns max. D to Q·PNP TTL inputs for low loading·Choice of ECL compatibility: MECL 10KH (10Hxxx) or 100K (100Hxxx)·Fully compatible with Motoro...
SY100H602: Features: ·9-bit ideal for byte-parity applications·Flow-through configuration·Extra TTL and ECL power/ground pins to minimize switching noise·Dual supply·3.5ns max. D to Q·PNP TTL inputs for low lo...
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DescriptionThe SY10/100E111 are low skew 1-to-9 differential drivers designed for clock distributi...

The SY10/SY100H602 are 9-bit, dual supply TTL-to-ECL translators with latches. Devices in the Micrel-Synergy 9-bit translator series utilize the 28-lead PLCC for optimal power pinning, signal flow-through and electrical performance.
The SY100H602 features D-type latches. Latching is controlled by Latch Enable (LEN), while the Master Reset input resets the latches. A post-latch logic enable is also provided (ENECL), allowing control of the output state without destroying latch data. All control inputs are ECL level.
The SY100H602 version is compatible with MECL 10KH ECL logic levels. The 100H version is compatible with 100K levels.